Searched refs:ddr_ctrl (Results 1 – 6 of 6) sorted by relevance
| /linux-6.1.9/Documentation/devicetree/bindings/memory-controllers/ |
| D | qca,ath79-ddr-controller.yaml | 48 ddr_ctrl: memory-controller@18000000 {
59 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
60 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
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| /linux-6.1.9/drivers/memory/ |
| D | brcmstb_memc.c | 30 void __iomem *ddr_ctrl; member
38 void __iomem *config = memc->ddr_ctrl + REG_MEMC_CNTRLR_CONFIG; in brcmstb_memc_uses_lpddr4()
49 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_srpd_config()
144 memc->ddr_ctrl = devm_platform_ioremap_resource(pdev, 0); in brcmstb_memc_probe()
145 if (IS_ERR(memc->ddr_ctrl)) in brcmstb_memc_probe()
146 return PTR_ERR(memc->ddr_ctrl); in brcmstb_memc_probe()
255 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_suspend()
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| /linux-6.1.9/Documentation/devicetree/bindings/interrupt-controller/ |
| D | qca,ath79-cpu-intc.txt | 35 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
36 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
41 ddr_ctrl: memory-controller@18000000 {
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| /linux-6.1.9/arch/mips/boot/dts/qca/ |
| D | ar9132.dtsi | 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
30 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
51 ddr_ctrl: memory-controller@18000000 { label
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| D | ar9331.dtsi | 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
55 ddr_ctrl: memory-controller@18000000 { label
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| /linux-6.1.9/drivers/soc/bcm/brcmstb/pm/ |
| D | pm-arm.c | 76 void __iomem *ddr_ctrl; member
233 tmp = readl_relaxed(ctrl.memcs[i].ddr_ctrl + in ddr_ctrl_set()
239 writel_relaxed(tmp, ctrl.memcs[i].ddr_ctrl + in ddr_ctrl_set()
794 ctrl.memcs[i].ddr_ctrl = base; in brcmstb_pm_probe()
846 iounmap(ctrl.memcs[i].ddr_ctrl); in brcmstb_pm_probe()
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