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Searched refs:dcfclk_khz (Results 1 – 22 of 22) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
Ddcn201_clk_mgr.c116 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
117 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
119 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
120 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr.c230 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz) in rv1_update_clocks()
248 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
249 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rv1_update_clocks()
268 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
288 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c259 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn2_update_clocks()
260 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn2_update_clocks()
262 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks()
263 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks()
265 …_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn2_update_clocks()
357 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn2_update_clocks_fpga()
358 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks_fpga()
478 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn2_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c232 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn3_update_clocks()
233 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn3_update_clocks()
235 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
236 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn3_update_clocks()
237 …0_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn3_update_clocks()
444 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn3_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c353 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn32_update_clocks()
354 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn32_update_clocks()
356 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn32_update_clocks()
357 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn32_update_clocks()
358 …32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn32_update_clocks()
707 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn32_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c195 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
196 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn31_update_clocks()
197 dcn31_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn31_update_clocks()
246 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn31_update_clocks()
314 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn31_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c198 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks()
199 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn316_update_clocks()
200 dcn316_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn316_update_clocks()
251 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn316_update_clocks()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c227 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks()
228 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn314_update_clocks()
229 dcn314_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn314_update_clocks()
278 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn314_update_clocks()
333 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn314_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
143 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in vg_update_clocks()
144 dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in vg_update_clocks()
474 else if (a->dcfclk_khz != b->dcfclk_khz) in vg_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c160 new_clocks->dcfclk_khz = UNSUPPORTED_DCFCLK; in dcn315_update_clocks()
161 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks()
162 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn315_update_clocks()
163 dcn315_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn315_update_clocks()
217 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn315_update_clocks()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
175 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks()
176 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
534 else if (a->dcfclk_khz != b->dcfclk_khz) in rn_are_clock_states_equal()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_debug.c353 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
Ddc.c4204 info->engineClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dcfclk_khz; in get_clock_requirements_for_state()
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_trace.h496 __field(int, dcfclk_khz)
514 __entry->dcfclk_khz = clk->dcfclk_khz;
539 __entry->dcfclk_khz,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer_debug.c475 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
Ddcn10_hw_sequencer.c463 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddcn31_fpu.c499 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc.h507 int dcfclk_khz; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h1088 uint32_t dcfclk_khz; /**< dcfclk kHz */ member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/calcs/
Ddcn_calcs.c1163 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
1427 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz); in dcn_find_dcfclk_suits_all()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c1014 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn20_calculate_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddcn32_fpu.c1250 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn32_calculate_dlg_params()