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Searched refs:dbi (Results 1 – 25 of 78) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/tiny/
Dili9225.c72 static inline int ili9225_command(struct mipi_dbi *dbi, u8 cmd, u16 data) in ili9225_command() argument
76 return mipi_dbi_command_buf(dbi, cmd, par, 2); in ili9225_command()
85 struct mipi_dbi *dbi = &dbidev->dbi; in ili9225_fb_dirty() local
86 bool swap = dbi->swap_bytes; in ili9225_fb_dirty()
100 if (!dbi->dc || !full || swap || in ili9225_fb_dirty()
145 ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_1, x2); in ili9225_fb_dirty()
146 ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_2, x1); in ili9225_fb_dirty()
147 ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_1, y2); in ili9225_fb_dirty()
148 ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_2, y1); in ili9225_fb_dirty()
150 ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, x_start); in ili9225_fb_dirty()
[all …]
Dili9341.c58 struct mipi_dbi *dbi = &dbidev->dbi; in yx240qv29_enable() local
73 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF); in yx240qv29_enable()
75 mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0xc1, 0x30); in yx240qv29_enable()
76 mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81); in yx240qv29_enable()
77 mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x00, 0x78); in yx240qv29_enable()
78 mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02); in yx240qv29_enable()
79 mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20); in yx240qv29_enable()
80 mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00); in yx240qv29_enable()
83 mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x23); in yx240qv29_enable()
84 mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x10); in yx240qv29_enable()
[all …]
Dmi0283qt.c56 struct mipi_dbi *dbi = &dbidev->dbi; in mi0283qt_enable() local
71 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF); in mi0283qt_enable()
73 mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30); in mi0283qt_enable()
74 mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81); in mi0283qt_enable()
75 mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79); in mi0283qt_enable()
76 mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02); in mi0283qt_enable()
77 mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20); in mi0283qt_enable()
78 mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00); in mi0283qt_enable()
81 mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26); in mi0283qt_enable()
82 mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11); in mi0283qt_enable()
[all …]
Dst7586.c116 struct mipi_dbi *dbi = &dbidev->dbi; in st7586_fb_dirty() local
136 mipi_dbi_command(dbi, MIPI_DCS_SET_COLUMN_ADDRESS, in st7586_fb_dirty()
139 mipi_dbi_command(dbi, MIPI_DCS_SET_PAGE_ADDRESS, in st7586_fb_dirty()
143 ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, in st7586_fb_dirty()
172 struct mipi_dbi *dbi = &dbidev->dbi; in st7586_pipe_enable() local
191 mipi_dbi_command(dbi, ST7586_AUTO_READ_CTRL, 0x9f); in st7586_pipe_enable()
192 mipi_dbi_command(dbi, ST7586_OTP_RW_CTRL, 0x00); in st7586_pipe_enable()
196 mipi_dbi_command(dbi, ST7586_OTP_READ); in st7586_pipe_enable()
200 mipi_dbi_command(dbi, ST7586_OTP_CTRL_OUT); in st7586_pipe_enable()
201 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in st7586_pipe_enable()
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Dst7735r.c65 struct mipi_dbi *dbi = &dbidev->dbi; in st7735r_pipe_enable() local
80 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in st7735r_pipe_enable()
83 mipi_dbi_command(dbi, ST7735R_FRMCTR1, 0x01, 0x2c, 0x2d); in st7735r_pipe_enable()
84 mipi_dbi_command(dbi, ST7735R_FRMCTR2, 0x01, 0x2c, 0x2d); in st7735r_pipe_enable()
85 mipi_dbi_command(dbi, ST7735R_FRMCTR3, 0x01, 0x2c, 0x2d, 0x01, 0x2c, in st7735r_pipe_enable()
87 mipi_dbi_command(dbi, ST7735R_INVCTR, 0x07); in st7735r_pipe_enable()
88 mipi_dbi_command(dbi, ST7735R_PWCTR1, 0xa2, 0x02, 0x84); in st7735r_pipe_enable()
89 mipi_dbi_command(dbi, ST7735R_PWCTR2, 0xc5); in st7735r_pipe_enable()
90 mipi_dbi_command(dbi, ST7735R_PWCTR3, 0x0a, 0x00); in st7735r_pipe_enable()
91 mipi_dbi_command(dbi, ST7735R_PWCTR4, 0x8a, 0x2a); in st7735r_pipe_enable()
[all …]
Dili9163.c41 struct mipi_dbi *dbi = &dbidev->dbi; in yx240qv29_enable() local
57 mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x04); in yx240qv29_enable()
58 mipi_dbi_command(dbi, ILI9163_EN3GAM, 0x00); in yx240qv29_enable()
61 mipi_dbi_command(dbi, ILI9163_FRMCTR1, 0x0a, 0x14); in yx240qv29_enable()
64 mipi_dbi_command(dbi, ILI9163_PWCTRL1, 0x0a, 0x00); in yx240qv29_enable()
65 mipi_dbi_command(dbi, ILI9163_PWCTRL2, 0x02); in yx240qv29_enable()
68 mipi_dbi_command(dbi, ILI9163_VMCTRL1, 0x2f, 0x3e); in yx240qv29_enable()
69 mipi_dbi_command(dbi, ILI9163_VMCTRL2, 0x40); in yx240qv29_enable()
72 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT); in yx240qv29_enable()
74 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in yx240qv29_enable()
[all …]
Dili9486.c91 struct mipi_dbi *dbi = &dbidev->dbi; in waveshare_enable() local
106 mipi_dbi_command(dbi, ILI9486_ITFCTR1); in waveshare_enable()
107 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in waveshare_enable()
110 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); in waveshare_enable()
112 mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44); in waveshare_enable()
114 mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00); in waveshare_enable()
116 mipi_dbi_command(dbi, ILI9486_PGAMCTRL, in waveshare_enable()
119 mipi_dbi_command(dbi, ILI9486_NGAMCTRL, in waveshare_enable()
122 mipi_dbi_command(dbi, ILI9486_DGAMCTRL, in waveshare_enable()
126 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON); in waveshare_enable()
[all …]
Dhx8357d.c52 struct mipi_dbi *dbi = &dbidev->dbi; in yx240qv29_enable() local
68 mipi_dbi_command(dbi, HX8357D_SETEXTC, 0xFF, 0x83, 0x57); in yx240qv29_enable()
72 mipi_dbi_command(dbi, HX8357D_SETRGB, 0x00, 0x00, 0x06, 0x06); in yx240qv29_enable()
75 mipi_dbi_command(dbi, HX8357D_SETCOM, 0x25); in yx240qv29_enable()
78 mipi_dbi_command(dbi, HX8357D_SETOSC, 0x68); in yx240qv29_enable()
81 mipi_dbi_command(dbi, HX8357D_SETPANEL, 0x05); in yx240qv29_enable()
83 mipi_dbi_command(dbi, HX8357D_SETPOWER, in yx240qv29_enable()
91 mipi_dbi_command(dbi, HX8357D_SETSTBA, in yx240qv29_enable()
99 mipi_dbi_command(dbi, HX8357D_SETCYC, in yx240qv29_enable()
108 mipi_dbi_command(dbi, HX8357D_SETGAMMA, in yx240qv29_enable()
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Dpanel-mipi-dbi.c166 static void panel_mipi_dbi_commands_execute(struct mipi_dbi *dbi, in panel_mipi_dbi_commands_execute() argument
182 mipi_dbi_command_stackbuf(dbi, command, parameters, num_parameters); in panel_mipi_dbi_commands_execute()
184 mipi_dbi_command(dbi, command); in panel_mipi_dbi_commands_execute()
195 struct mipi_dbi *dbi = &dbidev->dbi; in panel_mipi_dbi_enable() local
207 panel_mipi_dbi_commands_execute(dbi, dbidev->driver_private); in panel_mipi_dbi_enable()
280 struct mipi_dbi *dbi; in panel_mipi_dbi_spi_probe() local
288 dbi = &dbidev->dbi; in panel_mipi_dbi_spi_probe()
304 dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); in panel_mipi_dbi_spi_probe()
305 if (IS_ERR(dbi->reset)) in panel_mipi_dbi_spi_probe()
306 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n"); in panel_mipi_dbi_spi_probe()
[all …]
/linux-6.1.9/drivers/gpu/drm/panel/
Dpanel-widechips-ws2401.c65 struct mipi_dbi dbi; member
106 struct mipi_dbi *dbi = &ws->dbi; in ws2401_read_mtp_id() local
110 ret = mipi_dbi_command_read(dbi, WS2401_READ_ID1, &id1); in ws2401_read_mtp_id()
115 ret = mipi_dbi_command_read(dbi, WS2401_READ_ID2, &id2); in ws2401_read_mtp_id()
120 ret = mipi_dbi_command_read(dbi, WS2401_READ_ID3, &id3); in ws2401_read_mtp_id()
130 struct mipi_dbi *dbi = &ws->dbi; in ws2401_power_on() local
155 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in ws2401_power_on()
156 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in ws2401_power_on()
160 mipi_dbi_command(dbi, WS2401_PASSWD1, 0x5a, 0x5a); in ws2401_power_on()
162 mipi_dbi_command(dbi, WS2401_RESCTL, 0x12); in ws2401_power_on()
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Dpanel-samsung-db7430.c56 struct mipi_dbi dbi; member
95 struct mipi_dbi *dbi = &db->dbi; in db7430_power_on() local
122 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, 0x0a); in db7430_power_on()
123 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, 0x0a); in db7430_power_on()
124 mipi_dbi_command(dbi, DB7430_ACCESS_PROT_OFF, 0x00); in db7430_power_on()
125 mipi_dbi_command(dbi, DB7430_PANEL_DRIVING, 0x28, 0x08); in db7430_power_on()
126 mipi_dbi_command(dbi, DB7430_SOURCE_CONTROL, in db7430_power_on()
128 mipi_dbi_command(dbi, DB7430_GATE_INTERFACE, in db7430_power_on()
130 mipi_dbi_command(dbi, DB7430_DISPLAY_H_TIMING, in db7430_power_on()
137 mipi_dbi_command(dbi, DB7430_RGB_SYNC_OPTION, 0x01); in db7430_power_on()
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Dpanel-ilitek-ili9341.c182 struct mipi_dbi *dbi; member
302 struct mipi_dbi *dbi = ili->dbi; in ili9341_dpi_init() local
306 mipi_dbi_command_stackbuf(dbi, 0xca, cfg->ca, ILI9341_CA_LEN); in ili9341_dpi_init()
307 mipi_dbi_command_stackbuf(dbi, ILI9341_POWERB, cfg->power_b, in ili9341_dpi_init()
309 mipi_dbi_command_stackbuf(dbi, ILI9341_POWER_SEQ, cfg->power_seq, in ili9341_dpi_init()
311 mipi_dbi_command_stackbuf(dbi, ILI9341_DTCA, cfg->dtca, in ili9341_dpi_init()
313 mipi_dbi_command_stackbuf(dbi, ILI9341_POWERA, cfg->power_a, in ili9341_dpi_init()
315 mipi_dbi_command(ili->dbi, ILI9341_PRC, cfg->prc); in ili9341_dpi_init()
316 mipi_dbi_command_stackbuf(dbi, ILI9341_DTCB, cfg->dtcb, in ili9341_dpi_init()
318 mipi_dbi_command_stackbuf(dbi, ILI9341_FRC, cfg->frc, ILI9341_FRC_LEN); in ili9341_dpi_init()
[all …]
Dpanel-samsung-s6d27a1.c44 struct mipi_dbi dbi; member
76 struct mipi_dbi *dbi = &ctx->dbi; in s6d27a1_read_mtp_id() local
80 ret = mipi_dbi_command_read(dbi, S6D27A1_READID1, &id1); in s6d27a1_read_mtp_id()
85 ret = mipi_dbi_command_read(dbi, S6D27A1_READID2, &id2); in s6d27a1_read_mtp_id()
90 ret = mipi_dbi_command_read(dbi, S6D27A1_READID3, &id3); in s6d27a1_read_mtp_id()
100 struct mipi_dbi *dbi = &ctx->dbi; in s6d27a1_power_on() local
125 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in s6d27a1_power_on()
126 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in s6d27a1_power_on()
130 mipi_dbi_command(dbi, S6D27A1_PASSWD_L2, 0x5A, 0x5A); in s6d27a1_power_on()
133 mipi_dbi_command(dbi, S6D27A1_RESCTL, 0x22); in s6d27a1_power_on()
[all …]
Dpanel-samsung-s6e63m0-spi.c23 struct mipi_dbi *dbi = trsp; in s6e63m0_spi_dcs_read() local
26 ret = mipi_dbi_command_read(dbi, cmd, data); in s6e63m0_spi_dcs_read()
36 struct mipi_dbi *dbi = trsp; in s6e63m0_spi_dcs_write() local
39 ret = mipi_dbi_command_stackbuf(dbi, data[0], (data + 1), (len - 1)); in s6e63m0_spi_dcs_write()
48 struct mipi_dbi *dbi; in s6e63m0_spi_probe() local
51 dbi = devm_kzalloc(dev, sizeof(*dbi), GFP_KERNEL); in s6e63m0_spi_probe()
52 if (!dbi) in s6e63m0_spi_probe()
55 ret = mipi_dbi_spi_init(spi, dbi, NULL); in s6e63m0_spi_probe()
59 dbi->read_commands = s6e63m0_dbi_read_commands; in s6e63m0_spi_probe()
61 return s6e63m0_probe(dev, dbi, s6e63m0_spi_dcs_read, in s6e63m0_spi_probe()
Dpanel-newvision-nv3052c.c32 struct mipi_dbi dbi; member
243 struct mipi_dbi *dbi = &priv->dbi; in nv3052c_prepare() local
260 err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd, in nv3052c_prepare()
269 err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); in nv3052c_prepare()
285 struct mipi_dbi *dbi = &priv->dbi; in nv3052c_unprepare() local
288 err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE); in nv3052c_unprepare()
301 struct mipi_dbi *dbi = &priv->dbi; in nv3052c_enable() local
304 err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON); in nv3052c_enable()
321 struct mipi_dbi *dbi = &priv->dbi; in nv3052c_disable() local
324 err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF); in nv3052c_disable()
[all …]
/linux-6.1.9/drivers/gpu/drm/
Ddrm_mipi_dbi.c103 static bool mipi_dbi_command_is_read(struct mipi_dbi *dbi, u8 cmd) in mipi_dbi_command_is_read() argument
107 if (!dbi->read_commands) in mipi_dbi_command_is_read()
111 if (!dbi->read_commands[i]) in mipi_dbi_command_is_read()
113 if (cmd == dbi->read_commands[i]) in mipi_dbi_command_is_read()
131 int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val) in mipi_dbi_command_read() argument
133 if (!dbi->read_commands) in mipi_dbi_command_read()
136 if (!mipi_dbi_command_is_read(dbi, cmd)) in mipi_dbi_command_read()
139 return mipi_dbi_command_buf(dbi, cmd, val, 1); in mipi_dbi_command_read()
153 int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len) in mipi_dbi_command_buf() argument
163 mutex_lock(&dbi->cmdlock); in mipi_dbi_command_buf()
[all …]
/linux-6.1.9/include/drm/
Ddrm_mipi_dbi.h32 int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num);
132 struct mipi_dbi dbi; member
148 int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi,
166 void mipi_dbi_hw_reset(struct mipi_dbi *dbi);
167 bool mipi_dbi_display_is_on(struct mipi_dbi *dbi);
175 int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val);
176 int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len);
177 int mipi_dbi_command_stackbuf(struct mipi_dbi *dbi, u8 cmd, const u8 *data,
193 #define mipi_dbi_command(dbi, cmd, seq...) \ argument
196 struct device *dev = &(dbi)->spi->dev; \
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/linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/
Duar.c195 static unsigned long map_offset(struct mlx5_core_dev *mdev, int dbi) in map_offset() argument
200 return dbi / MLX5_BFREGS_PER_UAR * MLX5_ADAPTER_PAGE_SIZE + in map_offset()
201 (dbi % MLX5_BFREGS_PER_UAR) * in map_offset()
214 int dbi; in alloc_bfreg() local
243 dbi = find_first_bit(bitmap, up->bfregs); in alloc_bfreg()
244 clear_bit(dbi, bitmap); in alloc_bfreg()
249 bfreg->map = up->map + map_offset(mdev, dbi); in alloc_bfreg()
252 bfreg->index = up->index + dbi / MLX5_BFREGS_PER_UAR; in alloc_bfreg()
295 unsigned int dbi; in mlx5_free_bfreg() local
310 dbi = addr_to_dbi_in_syspage(mdev, up, bfreg); in mlx5_free_bfreg()
[all …]
/linux-6.1.9/Documentation/devicetree/bindings/pci/
Dsocionext,uniphier-pcie-ep.yaml34 - const: dbi
39 - const: dbi
96 reg-names = "dbi", "dbi2", "link", "addr_space";
Dsnps,dw-pcie-ep.yaml27 It should contain Data Bus Interface (dbi) and config registers for all
37 enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
86 reg-names = "dbi", "dbi2", "addr_space";
Dsnps,dw-pcie.yaml27 It should contain Data Bus Interface (dbi) and config registers for all
37 enum: [ dbi, dbi2, config, atu, atu_dma, app, appl, elbi, mgmt, ctrl,
95 reg-names = "dbi", "config";
Drockchip-dw-pcie.yaml35 - const: dbi
43 - description: AHB clock for PCIe dbi
107 reg-names = "dbi", "apb", "config";
Dintel,keembay-pcie-ep.yaml22 - const: dbi
62 reg-names = "dbi", "dbi2", "atu", "addr_space", "apb";
Dpcie-al.txt27 - "dbi" Designware PCIe registers
36 reg-names = "config", "controller", "dbi";
/linux-6.1.9/drivers/target/
Dtarget_core_user.c188 uint32_t *dbi; member
494 #define tcmu_cmd_set_dbi(cmd, index) ((cmd)->dbi[(cmd)->dbi_cur++] = (index))
495 #define tcmu_cmd_get_dbi(cmd) ((cmd)->dbi[(cmd)->dbi_cur++])
503 clear_bit(tcmu_cmd->dbi[i], udev->data_bitmap); in tcmu_cmd_free_data()
512 int i, cnt, dbi, dpi; in tcmu_get_empty_block() local
515 dbi = find_first_zero_bit(udev->data_bitmap, udev->dbi_thresh); in tcmu_get_empty_block()
516 if (dbi == udev->dbi_thresh) in tcmu_get_empty_block()
519 dpi = dbi * udev->data_pages_per_blk; in tcmu_get_empty_block()
542 if (i && dbi > udev->dbi_max) in tcmu_get_empty_block()
543 udev->dbi_max = dbi; in tcmu_get_empty_block()
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