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Searched refs:d71 (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/arm/display/komeda/d71/
Dd71_dev.c181 struct d71_dev *d71 = mdev->chip_data; in d71_irq_handler() local
184 gcu_status = malidp_read32(d71->gcu_addr, GLB_IRQ_STATUS); in d71_irq_handler()
187 raw_status = malidp_read32(d71->gcu_addr, BLK_IRQ_RAW_STATUS); in d71_irq_handler()
193 status = malidp_read32(d71->gcu_addr, BLK_STATUS); in d71_irq_handler()
196 malidp_write32_mask(d71->gcu_addr, BLK_STATUS, in d71_irq_handler()
201 malidp_write32(d71->gcu_addr, BLK_IRQ_CLEAR, raw_status); in d71_irq_handler()
205 evts->pipes[0] |= get_pipeline_event(d71->pipes[0], gcu_status); in d71_irq_handler()
208 evts->pipes[1] |= get_pipeline_event(d71->pipes[1], gcu_status); in d71_irq_handler()
221 struct d71_dev *d71 = mdev->chip_data; in d71_enable_irq() local
225 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, in d71_enable_irq()
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Dd71_component.c112 static u32 __get_blk_line_size(struct d71_dev *d71, u32 __iomem *reg, in __get_blk_line_size() argument
115 if (!d71->periph_addr) in __get_blk_line_size()
121 static u32 get_blk_line_size(struct d71_dev *d71, u32 __iomem *reg) in get_blk_line_size() argument
123 return __get_blk_line_size(d71, reg, d71->max_line_size); in get_blk_line_size()
407 static int d71_layer_init(struct d71_dev *d71, in d71_layer_init() argument
415 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*layer), in d71_layer_init()
434 if (!d71->periph_addr) { in d71_layer_init()
438 } else if (d71->max_line_size > 2048) { in d71_layer_init()
440 layer->line_sz = d71->max_line_size; in d71_layer_init()
446 layer->line_sz = d71->max_line_size * 2; in d71_layer_init()
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Dd71_dev.h48 int d71_probe_block(struct d71_dev *d71,
/linux-6.1.9/drivers/gpu/drm/arm/display/komeda/
DMakefile23 d71/d71_dev.o \
24 d71/d71_component.o
/linux-6.1.9/Documentation/devicetree/bindings/display/
Darm,komeda.yaml23 - const: arm,mali-d71
24 - const: arm,mali-d71
97 compatible = "arm,mali-d71";