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Searched refs:cw1 (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn32.c147 const struct dmub_window *cw1) in dmub_dcn32_backdoor_load() argument
165 dmub_dcn32_translate_addr(&cw1->offset, fb_base, fb_offset, &offset); in dmub_dcn32_backdoor_load()
169 REG_WRITE(DMCUB_REGION3_CW1_BASE_ADDRESS, cw1->region.base); in dmub_dcn32_backdoor_load()
171 DMCUB_REGION3_CW1_TOP_ADDRESS, cw1->region.top, in dmub_dcn32_backdoor_load()
180 const struct dmub_window *cw1) in dmub_dcn32_backdoor_load_zfb_mode() argument
195 offset = cw1->offset; in dmub_dcn32_backdoor_load_zfb_mode()
199 REG_WRITE(DMCUB_REGION3_CW1_BASE_ADDRESS, cw1->region.base); in dmub_dcn32_backdoor_load_zfb_mode()
201 DMCUB_REGION3_CW1_TOP_ADDRESS, cw1->region.top, in dmub_dcn32_backdoor_load_zfb_mode()
Ddmub_dcn30.c89 const struct dmub_window *cw1) in dmub_dcn30_backdoor_load() argument
109 dmub_dcn30_translate_addr(&cw1->offset, fb_base, fb_offset, &offset); in dmub_dcn30_backdoor_load()
113 REG_WRITE(DMCUB_REGION3_CW1_BASE_ADDRESS, cw1->region.base); in dmub_dcn30_backdoor_load()
115 DMCUB_REGION3_CW1_TOP_ADDRESS, cw1->region.top, in dmub_dcn30_backdoor_load()
Ddmub_dcn30.h39 const struct dmub_window *cw1);
Ddmub_dcn20.c156 const struct dmub_window *cw1) in dmub_dcn20_backdoor_load() argument
176 dmub_dcn20_translate_addr(&cw1->offset, fb_base, fb_offset, &offset); in dmub_dcn20_backdoor_load()
180 REG_WRITE(DMCUB_REGION3_CW1_BASE_ADDRESS, cw1->region.base); in dmub_dcn20_backdoor_load()
182 DMCUB_REGION3_CW1_TOP_ADDRESS, cw1->region.top, in dmub_dcn20_backdoor_load()
Ddmub_dcn31.c154 const struct dmub_window *cw1) in dmub_dcn31_backdoor_load() argument
172 dmub_dcn31_translate_addr(&cw1->offset, fb_base, fb_offset, &offset); in dmub_dcn31_backdoor_load()
176 REG_WRITE(DMCUB_REGION3_CW1_BASE_ADDRESS, cw1->region.base); in dmub_dcn31_backdoor_load()
178 DMCUB_REGION3_CW1_TOP_ADDRESS, cw1->region.top, in dmub_dcn31_backdoor_load()
Ddmub_srv.c516 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; in dmub_srv_hw_init() local
539 cw1.offset.quad_part = stack_fb->gpu_addr; in dmub_srv_hw_init()
540 cw1.region.base = DMUB_CW1_BASE; in dmub_srv_hw_init()
541 cw1.region.top = cw1.region.base + stack_fb->size - 1; in dmub_srv_hw_init()
555 dmub->hw_funcs.backdoor_load_zfb_mode(dmub, &cw0, &cw1); in dmub_srv_hw_init()
557 dmub->hw_funcs.backdoor_load(dmub, &cw0, &cw1); in dmub_srv_hw_init()
Ddmub_dcn32.h193 const struct dmub_window *cw1);
197 const struct dmub_window *cw1);
Ddmub_dcn20.h193 const struct dmub_window *cw1);
Ddmub_dcn31.h195 const struct dmub_window *cw1);
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/
Ddmub_srv.h314 const struct dmub_window *cw1);
318 const struct dmub_window *cw1);