Home
last modified time | relevance | path

Searched refs:ctx_reg (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dintel_gt_regs.h200 #define GEN7_CXT_POWER_SIZE(ctx_reg) (((ctx_reg) >> 25) & 0x7f) argument
201 #define GEN7_CXT_RING_SIZE(ctx_reg) (((ctx_reg) >> 22) & 0x7) argument
202 #define GEN7_CXT_RENDER_SIZE(ctx_reg) (((ctx_reg) >> 16) & 0x3f) argument
203 #define GEN7_CXT_EXTENDED_SIZE(ctx_reg) (((ctx_reg) >> 9) & 0x7f) argument
204 #define GEN7_CXT_GT1_SIZE(ctx_reg) (((ctx_reg) >> 6) & 0x7) argument
205 #define GEN7_CXT_VFSTATE_SIZE(ctx_reg) (((ctx_reg) >> 0) & 0x3f) argument
206 #define GEN7_CXT_TOTAL_SIZE(ctx_reg) (GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \ argument
207 GEN7_CXT_VFSTATE_SIZE(ctx_reg))
/linux-6.1.9/drivers/spi/
Dspi-ti-qspi.c53 struct ti_qspi_regs ctx_reg; member
174 struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; in ti_qspi_setup_clk() local
186 if (ctx_reg->clkctrl != clk_ctrl_new) { in ti_qspi_setup_clk()
196 ctx_reg->clkctrl = clk_ctrl_new; in ti_qspi_setup_clk()
205 struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; in ti_qspi_restore_ctx() local
207 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG); in ti_qspi_restore_ctx()
/linux-6.1.9/tools/perf/util/
Dbpf-prologue.c112 gen_ldx_reg_from_ctx(struct bpf_insn_pos *pos, int ctx_reg, in gen_ldx_reg_from_ctx() argument
122 ins(BPF_LDX_MEM(BPF_DW, target_reg, ctx_reg, offset), pos); in gen_ldx_reg_from_ctx()
/linux-6.1.9/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dnv04.c1135 static u32 *ctx_reg(struct nv04_gr_chan *chan, u32 reg) in ctx_reg() function
1198 *ctx_reg(chan, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31; in nv04_gr_chan_new()
/linux-6.1.9/kernel/bpf/
Dverifier.c10467 static const int ctx_reg = BPF_REG_6; in check_ld_abs() local
10489 err = check_reg_arg(env, ctx_reg, SRC_OP); in check_ld_abs()
10508 if (regs[ctx_reg].type != PTR_TO_CTX) { in check_ld_abs()
10521 err = check_ptr_off_reg(env, &regs[ctx_reg], ctx_reg); in check_ld_abs()