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Searched refs:csr_reg (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/clk/
Dclk-xgene.c380 void __iomem *csr_reg; in xgene_pmdclk_init() local
397 csr_reg = of_iomap(np, 0); in xgene_pmdclk_init()
398 if (!csr_reg) { in xgene_pmdclk_init()
409 csr_reg, XGENE_CLK_PMD_SHIFT, in xgene_pmdclk_init()
417 if (csr_reg) in xgene_pmdclk_init()
418 iounmap(csr_reg); in xgene_pmdclk_init()
424 void __iomem *csr_reg; /* CSR for IP clock */ member
452 if (pclk->param.csr_reg) { in xgene_clk_enable()
455 data = xgene_clk_read(pclk->param.csr_reg + in xgene_clk_enable()
458 xgene_clk_write(data, pclk->param.csr_reg + in xgene_clk_enable()
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/linux-6.1.9/drivers/net/wireless/intersil/orinoco/
Dorinoco_plx.c143 u32 csr_reg; in orinoco_plx_hw_init() local
166 csr_reg = ioread32(card->bridge_io + PLX_INTCSR); in orinoco_plx_hw_init()
167 if (!(csr_reg & PLX_INTCSR_INTEN)) { in orinoco_plx_hw_init()
168 csr_reg |= PLX_INTCSR_INTEN; in orinoco_plx_hw_init()
169 iowrite32(csr_reg, card->bridge_io + PLX_INTCSR); in orinoco_plx_hw_init()
170 csr_reg = ioread32(card->bridge_io + PLX_INTCSR); in orinoco_plx_hw_init()
171 if (!(csr_reg & PLX_INTCSR_INTEN)) { in orinoco_plx_hw_init()
/linux-6.1.9/arch/powerpc/boot/
Dugecon.c40 u32 *csr_reg = ug_io_base + EXI_CSR; in ug_io_transaction() local
47 out_be32(csr_reg, csr); in ug_io_transaction()
59 out_be32(csr_reg, 0); in ug_io_transaction()
/linux-6.1.9/arch/powerpc/platforms/embedded6xx/
Dusbgecko_udbg.c48 u32 __iomem *csr_reg = ug_io_base + EXI_CSR; in ug_io_transaction() local
55 out_be32(csr_reg, csr); in ug_io_transaction()
67 out_be32(csr_reg, 0); in ug_io_transaction()
/linux-6.1.9/arch/arm/boot/dts/
Dbcm59056.dtsi49 csr_reg: csr { label
/linux-6.1.9/arch/sparc/kernel/
Dpci_schizo.c584 unsigned long csr_reg, csr, csr_error_bits; in schizo_pcierr_intr_other() local
588 csr_reg = pbm->pbm_regs + SCHIZO_PCI_CTRL; in schizo_pcierr_intr_other()
589 csr = upa_readq(csr_reg); in schizo_pcierr_intr_other()
599 upa_writeq(csr, csr_reg); in schizo_pcierr_intr_other()