Searched refs:crtc_reg (Results 1 – 9 of 9) sorted by relevance
95 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_disable()122 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()137 fpc = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].fp_control; in nv04_dfp_update_fp_control()251 struct nv04_crtc_reg *crtcstate = nv04_display(dev)->mode_reg.crtc_reg; in nv04_dfp_prepare()288 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()289 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()464 nv04_display(dev)->mode_reg.crtc_reg[head].fp_control = in nv04_dfp_commit()605 (&nv04_display(dev)->saved_reg.crtc_reg[head].pllvals); in nv04_dfp_restore()
67 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_digital_vibrance()82 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_set_image_sharpening()125 struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index]; in nv_crtc_calc_state_ext()241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_vga()466 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()467 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()546 …regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] = nv04_display(dev)->saved_reg.crtc_reg[0].CRTC[NV_CIO_CRE_TV… in nv_crtc_mode_set_regs()670 struct nv04_crtc_reg *crtc_state = &state->crtc_reg[nv_crtc->index]; in nv_crtc_save()672 struct nv04_crtc_reg *crtc_saved = &saved->crtc_reg[nv_crtc->index]; in nv_crtc_save()691 uint8_t saved_cr21 = nv04_display(dev)->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21]; in nv_crtc_restore()[all …]
398 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ramdac()474 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ramdac()544 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_vga()568 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_vga()595 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_save_state_ext()671 struct nv04_crtc_reg *regp = &state->crtc_reg[head]; in nv_load_state_ext()788 state->crtc_reg[head].DAC[i] = nvif_rd08(device, in nv_save_state_palette()808 state->crtc_reg[head].DAC[i]); in nouveau_hw_load_state_palette()
107 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv04_tv_bind()146 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_tv_mode_set()
42 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; in nv04_cursor_set_offset()
76 struct nv04_crtc_reg crtc_reg[2]; member
403 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[ in nv17_tv_prepare()464 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_tv_mode_set()
376 &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX]; in nv_show_cursor()
547 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head]; in nv17_ctv_update_rescaler()