Searched refs:con_offset (Results 1 – 6 of 6) sorted by relevance
| /linux-6.1.9/arch/arm/mach-s3c/ |
| D | gpio-samsung.c | 590 unsigned con_offset = offset; in samsung_gpiolib_4bit2_output() local
592 if (con_offset > 7) in samsung_gpiolib_4bit2_output()
593 con_offset -= 8; in samsung_gpiolib_4bit2_output()
598 con &= ~(0xf << con_4bit_shift(con_offset)); in samsung_gpiolib_4bit2_output()
599 con |= 0x1 << con_4bit_shift(con_offset); in samsung_gpiolib_4bit2_output()
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| /linux-6.1.9/drivers/clk/samsung/ |
| D | clk.h | 252 int con_offset; member
265 .con_offset = _con, \
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| D | clk-pll.c | 1580 pll->con_reg = base + pll_clk->con_offset; in _samsung_clk_register_pll()
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| /linux-6.1.9/drivers/clk/rockchip/ |
| D | clk.h | 338 int con_offset; member
358 .con_offset = _con, \
369 u8 num_parents, int con_offset, int grf_lock_offset,
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| D | clk-pll.c | 852 u8 num_parents, int con_offset, int grf_lock_offset, in rockchip_clk_register_pll() argument
967 pll->reg_base = ctx->reg_base + con_offset; in rockchip_clk_register_pll()
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| D | clk.c | 422 list->con_offset, grf_lock_offset, in rockchip_clk_register_plls()
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