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Searched refs:cmdq_reg (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/mediatek/
Dmtk_mdp_rdma.c83 struct cmdq_client_reg cmdq_reg; member
142 FLD_EXT_PREULTRA_EN | FLD_COMMAND_DIV, &priv->cmdq_reg, in mtk_mdp_rdma_fifo_config()
152 mtk_ddp_write_mask(cmdq_pkt, FLD_ROT_ENABLE, &priv->cmdq_reg, in mtk_mdp_rdma_start()
160 mtk_ddp_write_mask(cmdq_pkt, 0, &priv->cmdq_reg, in mtk_mdp_rdma_stop()
162 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, MDP_RDMA_RESET); in mtk_mdp_rdma_stop()
163 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, MDP_RDMA_RESET); in mtk_mdp_rdma_stop()
177 mtk_ddp_write_mask(cmdq_pkt, FLD_UNIFORM_CONFIG, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
179 mtk_ddp_write_mask(cmdq_pkt, rdma_fmt_convert(cfg->fmt), &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
183 mtk_ddp_write_mask(cmdq_pkt, FLD_OUTPUT_ARGB, &priv->cmdq_reg, in mtk_mdp_rdma_config()
186 mtk_ddp_write_mask(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, in mtk_mdp_rdma_config()
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Dmtk_disp_merge.c68 struct cmdq_client_reg cmdq_reg; member
89 mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
92 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, in mtk_merge_start_cmdq()
101 mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
104 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, in mtk_merge_stop_cmdq()
115 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_36); in mtk_merge_fifo_setting()
118 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_37, in mtk_merge_fifo_setting()
122 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_40, in mtk_merge_fifo_setting()
126 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_41, in mtk_merge_fifo_setting()
157 mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs, in mtk_merge_advance_config()
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Dmtk_drm_ddp_comp.c66 struct cmdq_client_reg cmdq_reg; member
70 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write() argument
75 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write()
76 cmdq_reg->offset + offset, value); in mtk_ddp_write()
83 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write_relaxed() argument
88 cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_relaxed()
89 cmdq_reg->offset + offset, value); in mtk_ddp_write_relaxed()
96 struct cmdq_client_reg *cmdq_reg, void __iomem *regs, in mtk_ddp_write_mask() argument
101 cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys, in mtk_ddp_write_mask()
102 cmdq_reg->offset + offset, value, mask); in mtk_ddp_write_mask()
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Dmtk_disp_rdma.c68 struct cmdq_client_reg cmdq_reg; member
163 mtk_ddp_write_mask(cmdq_pkt, width, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
165 mtk_ddp_write_mask(cmdq_pkt, height, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_config()
183 mtk_ddp_write(cmdq_pkt, reg, &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_FIFO_CON); in mtk_rdma_config()
240 mtk_ddp_write_relaxed(cmdq_pkt, con, &rdma->cmdq_reg, rdma->regs, DISP_RDMA_MEM_CON); in mtk_rdma_layer_config()
243 mtk_ddp_write_mask(cmdq_pkt, RDMA_MATRIX_ENABLE, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
247 &rdma->cmdq_reg, rdma->regs, DISP_REG_RDMA_SIZE_CON_0, in mtk_rdma_layer_config()
250 mtk_ddp_write_mask(cmdq_pkt, 0, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
254 mtk_ddp_write_relaxed(cmdq_pkt, addr, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
256 mtk_ddp_write_relaxed(cmdq_pkt, pitch, &rdma->cmdq_reg, rdma->regs, in mtk_rdma_layer_config()
[all …]
Dmtk_disp_ccorr.c44 struct cmdq_client_reg cmdq_reg; member
68 mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
70 mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs, in mtk_ccorr_config()
130 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); in mtk_ccorr_ctm_set()
132 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1); in mtk_ccorr_ctm_set()
134 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2); in mtk_ccorr_ctm_set()
136 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3); in mtk_ccorr_ctm_set()
138 &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4); in mtk_ccorr_ctm_set()
182 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_ccorr_probe()
Dmtk_disp_ovl.c81 struct cmdq_client_reg cmdq_reg; member
185 mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_config()
187 mtk_ddp_write_relaxed(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_BGCLR); in mtk_ovl_config()
189 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); in mtk_ovl_config()
190 mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); in mtk_ovl_config()
242 mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on()
254 &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RDMA_GMC(idx)); in mtk_ovl_layer_on()
255 mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_on()
264 mtk_ddp_write_mask(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
266 mtk_ddp_write(cmdq_pkt, 0, &ovl->cmdq_reg, ovl->regs, in mtk_ovl_layer_off()
[all …]
Dmtk_disp_aal.c36 struct cmdq_client_reg cmdq_reg; member
60 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
61 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
127 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_aal_probe()
Dmtk_disp_color.c42 struct cmdq_client_reg cmdq_reg; member
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
119 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_color_probe()
Dmtk_disp_gamma.c39 struct cmdq_client_reg cmdq_reg; member
108 mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs, in mtk_gamma_config()
111 mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc, in mtk_gamma_config()
170 ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); in mtk_disp_gamma_probe()
Dmtk_drm_ddp_comp.h214 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
217 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
220 struct cmdq_client_reg *cmdq_reg, void __iomem *regs,
Dmtk_disp_drv.h39 void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
/linux-6.1.9/drivers/soc/mediatek/
Dmtk-mutex.c233 struct cmdq_client_reg cmdq_reg; member
688 if (!mtx->cmdq_reg.size) { in mtk_mutex_enable_by_cmdq()
693 cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, in mtk_mutex_enable_by_cmdq()
825 ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); in mtk_mutex_probe()
/linux-6.1.9/drivers/media/platform/mediatek/mdp3/
Dmtk-mdp3-comp.c759 struct cmdq_client_reg cmdq_reg; in mdp_get_subsys_id() local
775 ret = cmdq_dev_get_client_reg(&comp_pdev->dev, &cmdq_reg, index); in mdp_get_subsys_id()
781 comp->subsys_id = cmdq_reg.subsys; in mdp_get_subsys_id()
782 dev_dbg(&comp_pdev->dev, "subsys id=%d\n", cmdq_reg.subsys); in mdp_get_subsys_id()