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Searched refs:clock_table (Results 1 – 22 of 22) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_clk_mgr.c571 const DpmClocks314_t *clock_table) in dcn314_clk_mgr_helper_populate_bw_params() argument
579 for (i = 0; i < clock_table->NumDfPstatesEnabled; i++) { in dcn314_clk_mgr_helper_populate_bw_params()
580 if (is_valid_clock_value(clock_table->DfPstateTable[i].FClk) && in dcn314_clk_mgr_helper_populate_bw_params()
581 clock_table->DfPstateTable[i].FClk > max_fclk) { in dcn314_clk_mgr_helper_populate_bw_params()
582 max_fclk = clock_table->DfPstateTable[i].FClk; in dcn314_clk_mgr_helper_populate_bw_params()
591 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn314_clk_mgr_helper_populate_bw_params()
592 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn314_clk_mgr_helper_populate_bw_params()
593 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn314_clk_mgr_helper_populate_bw_params()
594 max_dppclk = find_max_clk_value(clock_table->DppClocks, clock_table->NumDispClkLevelsEnabled); in dcn314_clk_mgr_helper_populate_bw_params()
601 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn314_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c467 const DpmClocks_316_t *clock_table, in find_clk_for_voltage() argument
476 if (clock_table->SocVoltage[i] == voltage) { in find_clk_for_voltage()
478 } else if (clock_table->SocVoltage[i] >= max_voltage && in find_clk_for_voltage()
479 clock_table->SocVoltage[i] < voltage) { in find_clk_for_voltage()
480 max_voltage = clock_table->SocVoltage[i]; in find_clk_for_voltage()
492 const DpmClocks_316_t *clock_table) in dcn316_clk_mgr_helper_populate_bw_params() argument
505 if (clock_table->DfPstateTable[i].FClk != 0) { in dcn316_clk_mgr_helper_populate_bw_params()
520 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn316_clk_mgr_helper_populate_bw_params()
521 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn316_clk_mgr_helper_populate_bw_params()
522 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn316_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c477 const DpmClocks_315_t *clock_table) in dcn315_clk_mgr_helper_populate_bw_params() argument
485 for (i = 0; i < clock_table->NumDfPstatesEnabled; i++) { in dcn315_clk_mgr_helper_populate_bw_params()
486 if (clock_table->DfPstateTable[i].FClk > max_fclk) { in dcn315_clk_mgr_helper_populate_bw_params()
487 max_fclk = clock_table->DfPstateTable[i].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
493 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn315_clk_mgr_helper_populate_bw_params()
495 uint32_t min_fclk = clock_table->DfPstateTable[0].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
497 for (j = 1; j < clock_table->NumDfPstatesEnabled; j++) { in dcn315_clk_mgr_helper_populate_bw_params()
498 if (clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i] in dcn315_clk_mgr_helper_populate_bw_params()
499 && clock_table->DfPstateTable[j].FClk < min_fclk) { in dcn315_clk_mgr_helper_populate_bw_params()
500 min_fclk = clock_table->DfPstateTable[j].FClk; in dcn315_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c531 const DpmClocks_t *clock_table, in find_clk_for_voltage() argument
540 if (clock_table->SocVoltage[i] == voltage) { in find_clk_for_voltage()
542 } else if (clock_table->SocVoltage[i] >= max_voltage && in find_clk_for_voltage()
543 clock_table->SocVoltage[i] < voltage) { in find_clk_for_voltage()
544 max_voltage = clock_table->SocVoltage[i]; in find_clk_for_voltage()
555 const DpmClocks_t *clock_table) in dcn31_clk_mgr_helper_populate_bw_params() argument
568 if (clock_table->DfPstateTable[i].FClk != 0) { in dcn31_clk_mgr_helper_populate_bw_params()
583 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn31_clk_mgr_helper_populate_bw_params()
584 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn31_clk_mgr_helper_populate_bw_params()
585 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c613 static unsigned int find_socclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) in find_socclk_for_voltage() argument
618 if (clock_table->SocClocks[i].Vol == voltage) in find_socclk_for_voltage()
619 return clock_table->SocClocks[i].Freq; in find_socclk_for_voltage()
626 static unsigned int find_dcfclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) in find_dcfclk_for_voltage() argument
631 if (clock_table->DcfClocks[i].Vol == voltage) in find_dcfclk_for_voltage()
632 return clock_table->DcfClocks[i].Freq; in find_dcfclk_for_voltage()
639 …populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integra… in rn_clk_mgr_helper_populate_bw_params() argument
650 if (clock_table->FClocks[i].Freq != 0 && clock_table->FClocks[i].Vol != 0) { in rn_clk_mgr_helper_populate_bw_params()
665 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
666 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Dvg_clk_mgr.c532 static unsigned int find_dcfclk_for_voltage(const struct vg_dpm_clocks *clock_table, in find_dcfclk_for_voltage() argument
538 if (clock_table->SocVoltage[i] == voltage) in find_dcfclk_for_voltage()
539 return clock_table->DcfClocks[i]; in find_dcfclk_for_voltage()
549 const struct vg_dpm_clocks *clock_table) in vg_clk_mgr_helper_populate_bw_params() argument
561 if (clock_table->DfPstateTable[i].fclk != 0) { in vg_clk_mgr_helper_populate_bw_params()
576 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params()
577 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params()
578 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; in vg_clk_mgr_helper_populate_bw_params()
579 …bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfP… in vg_clk_mgr_helper_populate_bw_params()
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu8_hwmgr.c437 struct SMU8_Fusion_ClkTable *clock_table; in smu8_upload_pptable_to_smu() local
462 clock_table = (struct SMU8_Fusion_ClkTable *)table; in smu8_upload_pptable_to_smu()
479 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid = in smu8_upload_pptable_to_smu()
481 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
485 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
488 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid = in smu8_upload_pptable_to_smu()
492 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
496 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
498 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
502 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
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Dsmu10_hwmgr.c486 DpmClocks_t *table = &(smu10_data->clock_table); in smu10_populate_clock_table()
498 &smu10_data->clock_table.DcefClocks[0]); in smu10_populate_clock_table()
501 &smu10_data->clock_table.SocClocks[0]); in smu10_populate_clock_table()
504 &smu10_data->clock_table.FClocks[0]); in smu10_populate_clock_table()
507 &smu10_data->clock_table.MemClocks[0]); in smu10_populate_clock_table()
633 if (min_mclk < data->clock_table.FClocks[0].Freq) in smu10_dpm_force_dpm_level()
634 min_mclk = data->clock_table.FClocks[0].Freq; in smu10_dpm_force_dpm_level()
Dprocesspptables.c410 struct phm_clock_array *clock_table; in get_valid_clk() local
412 clock_table = kzalloc(struct_size(clock_table, values, table->count), GFP_KERNEL); in get_valid_clk()
413 if (!clock_table) in get_valid_clk()
416 clock_table->count = (unsigned long)table->count; in get_valid_clk()
418 for (i = 0; i < clock_table->count; i++) in get_valid_clk()
419 clock_table->values[i] = (unsigned long)table->entries[i].clk; in get_valid_clk()
421 *ptable = clock_table; in get_valid_clk()
Dsmu10_hwmgr.h297 DpmClocks_t clock_table; member
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c755 static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) in renoir_get_dpm_clock_table() argument
760 if (!clock_table || !table) in renoir_get_dpm_clock_table()
764 clock_table->DcfClocks[i].Freq = table->DcfClocks[i].Freq; in renoir_get_dpm_clock_table()
765 clock_table->DcfClocks[i].Vol = table->DcfClocks[i].Vol; in renoir_get_dpm_clock_table()
769 clock_table->SocClocks[i].Freq = table->SocClocks[i].Freq; in renoir_get_dpm_clock_table()
770 clock_table->SocClocks[i].Vol = table->SocClocks[i].Vol; in renoir_get_dpm_clock_table()
774 clock_table->FClocks[i].Freq = table->FClocks[i].Freq; in renoir_get_dpm_clock_table()
775 clock_table->FClocks[i].Vol = table->FClocks[i].Vol; in renoir_get_dpm_clock_table()
779 clock_table->MemClocks[i].Freq = table->MemClocks[i].Freq; in renoir_get_dpm_clock_table()
780 clock_table->MemClocks[i].Vol = table->MemClocks[i].Vol; in renoir_get_dpm_clock_table()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h283 struct dpm_clocks *clock_table);
303 struct dpm_clocks *clock_table);
/linux-6.1.9/drivers/tty/serial/8250/
D8250_fintek.c288 static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ, in fintek_8250_set_termios() local
329 clock_table[i]); in fintek_8250_set_termios()
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c2089 static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) in vangogh_get_dpm_clock_table() argument
2094 if (!clock_table || !table) in vangogh_get_dpm_clock_table()
2098 clock_table->SocClocks[i].Freq = table->SocClocks[i]; in vangogh_get_dpm_clock_table()
2099 clock_table->SocClocks[i].Vol = table->SocVoltage[i]; in vangogh_get_dpm_clock_table()
2103 clock_table->FClocks[i].Freq = table->DfPstateTable[i].fclk; in vangogh_get_dpm_clock_table()
2104 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table()
2108 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk; in vangogh_get_dpm_clock_table()
2109 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table()
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c726 struct pp_smu *pp, struct dpm_clocks *clock_table) in pp_rn_get_dpm_clock_table() argument
732 ret = amdgpu_dpm_get_dpm_clock_table(adev, clock_table); in pp_rn_get_dpm_clock_table()
/linux-6.1.9/drivers/usb/serial/
Df81232.c128 static u8 const clock_table[] = { F81232_CLK_1_846_MHZ, F81232_CLK_14_77_MHZ, variable
518 F81232_CLK_MASK, clock_table[idx]); in f81232_set_baudrate()
Df81534.c190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable
586 port_priv->shadow_clk |= clock_table[idx]; in f81534_set_port_config()
/linux-6.1.9/drivers/gpu/drm/amd/pm/inc/
Damdgpu_dpm.h557 struct dpm_clocks *clock_table);
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h411 struct dpm_clocks *clock_table);
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/inc/
Damdgpu_smu.h870 int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
/linux-6.1.9/drivers/gpu/drm/amd/pm/
Damdgpu_dpm.c1735 struct dpm_clocks *clock_table) in amdgpu_dpm_get_dpm_clock_table() argument
1745 clock_table); in amdgpu_dpm_get_dpm_clock_table()
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c2887 struct dpm_clocks *clock_table) in smu_get_dpm_clock_table() argument
2896 ret = smu->ppt_funcs->get_dpm_clock_table(smu, clock_table); in smu_get_dpm_clock_table()