| /linux-6.1.9/arch/riscv/boot/dts/microchip/ |
| D | mpfs.dtsi | 25 clocks = <&clkcfg CLK_CPU>;
51 clocks = <&clkcfg CLK_CPU>;
79 clocks = <&clkcfg CLK_CPU>;
107 clocks = <&clkcfg CLK_CPU>;
135 clocks = <&clkcfg CLK_CPU>;
232 clkcfg: clkcfg@20002000 { label
233 compatible = "microchip,mpfs-clkcfg";
247 clocks = <&clkcfg CLK_MMUART0>;
259 clocks = <&clkcfg CLK_MMUART1>;
271 clocks = <&clkcfg CLK_MMUART2>;
[all …]
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| /linux-6.1.9/drivers/clk/pxa/ |
| D | clk-pxa.c | 135 unsigned int unused, clkcfg; in pxa2xx_core_turbo_switch() local
139 asm("mrc p14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in pxa2xx_core_turbo_switch()
140 clkcfg &= ~CLKCFG_TURBO & ~CLKCFG_HALFTURBO; in pxa2xx_core_turbo_switch()
142 clkcfg |= CLKCFG_TURBO; in pxa2xx_core_turbo_switch()
143 clkcfg |= CLKCFG_FCS; in pxa2xx_core_turbo_switch()
152 : "=&r" (unused) : "r" (clkcfg)); in pxa2xx_core_turbo_switch()
161 unsigned int clkcfg = freq->clkcfg; in pxa2xx_cpll_change() local
206 : "r" (mdrefr), "r" (clkcfg), "r" (preset_mdrefr), in pxa2xx_cpll_change()
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| D | clk-pxa27x.c | 203 unsigned long clkcfg; in clk_pxa27x_cpll_get_rate() local
208 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in clk_pxa27x_cpll_get_rate()
209 t = clkcfg & (1 << 0); in clk_pxa27x_cpll_get_rate()
210 ht = clkcfg & (1 << 2); in clk_pxa27x_cpll_get_rate()
300 unsigned long clkcfg; in clk_pxa27x_core_get_parent() local
308 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in clk_pxa27x_core_get_parent()
309 t = clkcfg & (1 << 0); in clk_pxa27x_core_get_parent()
310 ht = clkcfg & (1 << 2); in clk_pxa27x_core_get_parent()
360 unsigned long clkcfg; in clk_pxa27x_system_bus_get_rate() local
365 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in clk_pxa27x_system_bus_get_rate()
[all …]
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| D | clk-pxa25x.c | 173 unsigned long clkcfg; in clk_pxa25x_core_get_parent() local
176 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in clk_pxa25x_core_get_parent()
177 t = clkcfg & (1 << 0); in clk_pxa25x_core_get_parent()
216 unsigned long clkcfg, cccr = readl(clk_regs + CCCR); in clk_pxa25x_cpll_get_rate() local
219 asm("mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg)); in clk_pxa25x_cpll_get_rate()
220 t = clkcfg & (1 << 0); in clk_pxa25x_cpll_get_rate()
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| D | clk-pxa.h | 141 unsigned int clkcfg; member
|
| /linux-6.1.9/Documentation/devicetree/bindings/clock/ |
| D | microchip,mpfs-clkcfg.yaml | 4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
22 const: microchip,mpfs-clkcfg
74 clkcfg: clock-controller@20002000 {
75 compatible = "microchip,mpfs-clkcfg";
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| /linux-6.1.9/Documentation/devicetree/bindings/rtc/ |
| D | microchip,mfps-rtc.yaml | 63 clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
|
| /linux-6.1.9/Documentation/devicetree/bindings/net/can/ |
| D | microchip,mpfs-can.yaml | 42 clocks = <&clkcfg 17>;
|
| /linux-6.1.9/Documentation/devicetree/bindings/usb/ |
| D | microchip,mpfs-musb.yaml | 52 clocks = <&clkcfg CLK_USB>;
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| /linux-6.1.9/Documentation/devicetree/bindings/spi/ |
| D | microchip,mpfs-spi.yaml | 54 clocks = <&clkcfg CLK_SPI0>;
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| /linux-6.1.9/Documentation/devicetree/bindings/i2c/ |
| D | microchip,corei2c.yaml | 51 clocks = <&clkcfg 15>;
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| /linux-6.1.9/Documentation/devicetree/bindings/gpio/ |
| D | microchip,mpfs-gpio.yaml | 82 clocks = <&clkcfg 25>;
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| /linux-6.1.9/drivers/clk/ralink/ |
| D | clk-mt7621.c | 255 u32 clkcfg, clk_sel, curclk, ffiv, ffrac; in mt7621_cpu_recalc_rate() local
259 regmap_read(sysc, SYSC_REG_CLKCFG0, &clkcfg); in mt7621_cpu_recalc_rate()
260 clk_sel = FIELD_GET(CPU_CLK_SEL_MASK, clkcfg); in mt7621_cpu_recalc_rate()
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| /linux-6.1.9/Documentation/devicetree/bindings/pwm/ |
| D | microchip,corepwm.yaml | 80 clocks = <&clkcfg 30>;
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| /linux-6.1.9/drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 2972 u32 clkcfg; in i9xx_hrawclk() local
2984 clkcfg = intel_de_read(dev_priv, CLKCFG) & CLKCFG_FSB_MASK; in i9xx_hrawclk()
2987 switch (clkcfg) { in i9xx_hrawclk()
3001 MISSING_CASE(clkcfg); in i9xx_hrawclk()
3005 switch (clkcfg) { in i9xx_hrawclk()
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