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Searched refs:clk_bypass (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/bridge/imx/
Dimx8qm-ldb-drv.c52 struct clk *clk_bypass; member
151 clk_set_rate(imx8qm_ldb->clk_bypass, di_clk); in imx8qm_ldb_bridge_mode_set()
217 clk_prepare_enable(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_enable()
282 clk_disable_unprepare(imx8qm_ldb->clk_bypass); in imx8qm_ldb_bridge_atomic_disable()
462 imx8qm_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qm_ldb_probe()
463 if (IS_ERR(imx8qm_ldb->clk_bypass)) { in imx8qm_ldb_probe()
464 ret = PTR_ERR(imx8qm_ldb->clk_bypass); in imx8qm_ldb_probe()
Dimx8qxp-ldb-drv.c48 struct clk *clk_bypass; member
161 clk_set_rate(imx8qxp_ldb->clk_bypass, di_clk); in imx8qxp_ldb_bridge_mode_set()
216 clk_prepare_enable(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_pre_enable()
281 clk_disable_unprepare(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_bridge_atomic_disable()
600 imx8qxp_ldb->clk_bypass = devm_clk_get(dev, "bypass"); in imx8qxp_ldb_probe()
601 if (IS_ERR(imx8qxp_ldb->clk_bypass)) { in imx8qxp_ldb_probe()
602 ret = PTR_ERR(imx8qxp_ldb->clk_bypass); in imx8qxp_ldb_probe()
/linux-6.1.9/drivers/clk/ti/
Ddpll44xx.c214 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap4_dpll_regm4xen_determine_rate()
216 req->best_parent_hw = dd->clk_bypass; in omap4_dpll_regm4xen_determine_rate()
Dfapll.c64 struct clk *clk_bypass; member
574 fd->clk_bypass = of_clk_get(node, 1); in ti_fapll_setup()
575 if (IS_ERR(fd->clk_bypass)) { in ti_fapll_setup()
657 if (fd->clk_bypass) in ti_fapll_setup()
658 clk_put(fd->clk_bypass); in ti_fapll_setup()
Ddpll3xxx.c546 if (clk_hw_get_rate(hw) == clk_hw_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
547 WARN_ON(parent != dd->clk_bypass); in omap3_noncore_dpll_enable()
598 if (clk_hw_get_rate(dd->clk_bypass) == req->rate && in omap3_noncore_dpll_determine_rate()
600 req->best_parent_hw = dd->clk_bypass; in omap3_noncore_dpll_determine_rate()
Dclkt_dpll.c254 return clk_hw_get_rate(dd->clk_bypass); in omap2_get_dpll_rate()
Dapll.c160 ad->clk_bypass = __clk_get_hw(clk); in omap_clk_register_apll()
Ddpll.c186 dd->clk_bypass = __clk_get_hw(clk); in _register_dpll()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_clk.c52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk… in rv1_dump_clk_registers()
/linux-6.1.9/include/linux/clk/
Dti.h88 struct clk_hw *clk_bypass; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h204 struct clk_bypass { struct