Home
last modified time | relevance | path

Searched refs:clidr (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/arch/arm64/include/asm/
Dcache.h15 #define CLIDR_LOUU(clidr) (((clidr) >> CLIDR_LOUU_SHIFT) & 0x7) argument
16 #define CLIDR_LOC(clidr) (((clidr) >> CLIDR_LOC_SHIFT) & 0x7) argument
17 #define CLIDR_LOUIS(clidr) (((clidr) >> CLIDR_LOUIS_SHIFT) & 0x7) argument
105 u64 clidr = read_sysreg(clidr_el1); in read_cpuid_effective_cachetype() local
107 if (CLIDR_LOC(clidr) == 0 || in read_cpuid_effective_cachetype()
108 (CLIDR_LOUIS(clidr) == 0 && CLIDR_LOUU(clidr) == 0)) in read_cpuid_effective_cachetype()
/linux-6.1.9/arch/arm64/kernel/
Dcacheinfo.c17 #define CLIDR_CTYPE(clidr, level) \ argument
18 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
31 u64 clidr; in get_cache_type() local
35 clidr = read_sysreg(clidr_el1); in get_cache_type()
36 return CLIDR_CTYPE(clidr, level); in get_cache_type()
/linux-6.1.9/arch/arm/mm/
Dcache-v7.S98 mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr
101 ands r3, r3, #7 << 1 @ extract LoU*2 field from clidr
126 mrc p15, 1, r0, c0, c0, 1 @ read clidr
128 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
134 mov r1, r0, lsr r2 @ extract cache type bits from clidr
Dcache-v7m.S176 ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
182 mov r1, r0, lsr r2 @ extract cache type bits from clidr
/linux-6.1.9/arch/arm64/kvm/
Dsys_regs.c2951 struct sys_reg_desc clidr; in kvm_sys_reg_table_init() local
2978 get_clidr_el1(NULL, &clidr); /* Ugly... */ in kvm_sys_reg_table_init()
2979 cache_levels = clidr.val; in kvm_sys_reg_table_init()