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Searched refs:clear_state_gpu_addr (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Damdgpu_rlc.h193 uint64_t clear_state_gpu_addr; member
Damdgpu_rlc.c135 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_init_csb()
267 &adev->gfx.rlc.clear_state_gpu_addr, in amdgpu_gfx_rlc_fini()
Dgfx_v6_0.c2380 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v6_0_rlc_init()
2390 reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256; in gfx_v6_0_rlc_init()
2802 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_gfx_cgpg()
2909 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
2917 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8); in gfx_v6_0_init_pg()
Dgfx_v7_0.c3868 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3869 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
4527 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v7_0_sw_fini()
Dgfx_v11_0.c663 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v11_0_rlc_fini()
1700 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v11_0_init_csb()
1702 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v11_0_init_csb()
Dgfx_v9_0.c2259 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v9_0_sw_fini()
2523 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v9_0_init_csb()
2525 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v9_0_init_csb()
Dgfx_v10_0.c4210 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v10_0_rlc_fini()
5110 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5112 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
5116 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v10_0_init_csb()
5118 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v10_0_init_csb()
Dgfx_v8_0.c2087 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v8_0_sw_fini()
3896 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v8_0_init_csb()
3898 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v8_0_init_csb()
/linux-6.1.9/drivers/gpu/drm/radeon/
Devergreen.c4269 &rdev->rlc.clear_state_gpu_addr); in sumo_rlc_init()
4288 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256; in sumo_rlc_init()
4295 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4); in sumo_rlc_init()
4415 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in evergreen_rlc_resume()
Dsi.c5284 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_gfx_cgpg()
5781 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
5787 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8); in si_init_pg()
Dradeon.h992 uint64_t clear_state_gpu_addr; member
Dcik.c6618 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()
6619 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr)); in cik_init_gfx_cgpg()