1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __AUDIOREACH_H__
4 #define __AUDIOREACH_H__
5 #include <linux/types.h>
6 #include <linux/soc/qcom/apr.h>
7 #include <sound/soc.h>
8 struct q6apm;
9 struct q6apm_graph;
10 
11 /* Module IDs */
12 #define MODULE_ID_WR_SHARED_MEM_EP	0x07001000
13 #define MODULE_ID_RD_SHARED_MEM_EP	0x07001001
14 #define MODULE_ID_GAIN			0x07001002
15 #define MODULE_ID_PCM_CNV		0x07001003
16 #define MODULE_ID_PCM_ENC		0x07001004
17 #define MODULE_ID_PCM_DEC		0x07001005
18 #define MODULE_ID_CODEC_DMA_SINK	0x07001023
19 #define MODULE_ID_CODEC_DMA_SOURCE	0x07001024
20 #define MODULE_ID_I2S_SINK		0x0700100A
21 #define MODULE_ID_I2S_SOURCE		0x0700100B
22 #define MODULE_ID_DATA_LOGGING		0x0700101A
23 
24 #define APM_CMD_GET_SPF_STATE		0x01001021
25 #define APM_CMD_RSP_GET_SPF_STATE	0x02001007
26 
27 #define APM_MODULE_INSTANCE_ID		0x00000001
28 #define PRM_MODULE_INSTANCE_ID		0x00000002
29 #define AMDB_MODULE_INSTANCE_ID		0x00000003
30 #define VCPM_MODULE_INSTANCE_ID		0x00000004
31 #define AR_MODULE_INSTANCE_ID_START	0x00006000
32 #define AR_MODULE_INSTANCE_ID_END	0x00007000
33 #define AR_MODULE_DYNAMIC_INSTANCE_ID_START	0x00007000
34 #define AR_MODULE_DYNAMIC_INSTANCE_ID_END	0x00008000
35 #define AR_CONT_INSTANCE_ID_START	0x00005000
36 #define AR_CONT_INSTANCE_ID_END		0x00006000
37 #define AR_SG_INSTANCE_ID_START		0x00004000
38 
39 #define APM_CMD_GRAPH_OPEN			0x01001000
40 #define APM_CMD_GRAPH_PREPARE			0x01001001
41 #define APM_CMD_GRAPH_START			0x01001002
42 #define APM_CMD_GRAPH_STOP			0x01001003
43 #define APM_CMD_GRAPH_CLOSE			0x01001004
44 #define APM_CMD_GRAPH_FLUSH			0x01001005
45 #define APM_CMD_SET_CFG				0x01001006
46 #define APM_CMD_GET_CFG				0x01001007
47 #define APM_CMD_SHARED_MEM_MAP_REGIONS		0x0100100C
48 #define APM_CMD_SHARED_MEM_UNMAP_REGIONS	0x0100100D
49 #define APM_CMD_RSP_SHARED_MEM_MAP_REGIONS	0x02001001
50 #define APM_CMD_RSP_GET_CFG			0x02001000
51 #define APM_CMD_CLOSE_ALL			0x01001013
52 #define APM_CMD_REGISTER_SHARED_CFG		0x0100100A
53 
54 #define APM_MEMORY_MAP_SHMEM8_4K_POOL		3
55 
56 struct apm_cmd_shared_mem_map_regions {
57 	uint16_t mem_pool_id;
58 	uint16_t num_regions;
59 	uint32_t property_flag;
60 } __packed;
61 
62 struct apm_shared_map_region_payload {
63 	uint32_t shm_addr_lsw;
64 	uint32_t shm_addr_msw;
65 	uint32_t mem_size_bytes;
66 } __packed;
67 
68 struct apm_cmd_shared_mem_unmap_regions {
69 	uint32_t mem_map_handle;
70 } __packed;
71 
72 struct apm_cmd_rsp_shared_mem_map_regions {
73 	uint32_t mem_map_handle;
74 } __packed;
75 
76 /* APM module */
77 #define APM_PARAM_ID_SUB_GRAPH_LIST		0x08001005
78 
79 #define APM_PARAM_ID_MODULE_LIST		0x08001002
80 
81 struct apm_param_id_modules_list {
82 	uint32_t num_modules_list;
83 } __packed;
84 
85 #define APM_PARAM_ID_MODULE_PROP		0x08001003
86 
87 struct apm_param_id_module_prop {
88 	uint32_t num_modules_prop_cfg;
89 } __packed;
90 
91 struct apm_module_prop_cfg {
92 	uint32_t instance_id;
93 	uint32_t num_props;
94 } __packed;
95 
96 #define APM_PARAM_ID_MODULE_CONN		0x08001004
97 
98 struct apm_param_id_module_conn {
99 	uint32_t num_connections;
100 } __packed;
101 
102 struct apm_module_conn_obj {
103 	uint32_t src_mod_inst_id;
104 	uint32_t src_mod_op_port_id;
105 	uint32_t dst_mod_inst_id;
106 	uint32_t dst_mod_ip_port_id;
107 } __packed;
108 
109 #define APM_PARAM_ID_GAIN			0x08001006
110 
111 struct param_id_gain_cfg {
112 	uint16_t gain;
113 	uint16_t reserved;
114 } __packed;
115 
116 #define PARAM_ID_PCM_OUTPUT_FORMAT_CFG		0x08001008
117 
118 struct param_id_pcm_output_format_cfg {
119 	uint32_t data_format;
120 	uint32_t fmt_id;
121 	uint32_t payload_size;
122 } __packed;
123 
124 struct payload_pcm_output_format_cfg {
125 	uint16_t bit_width;
126 	uint16_t alignment;
127 	uint16_t bits_per_sample;
128 	uint16_t q_factor;
129 	uint16_t endianness;
130 	uint16_t interleaved;
131 	uint16_t reserved;
132 	uint16_t num_channels;
133 	uint8_t channel_mapping[];
134 } __packed;
135 
136 #define PARAM_ID_ENC_BITRATE			0x08001052
137 
138 struct param_id_enc_bitrate_param {
139 	uint32_t bitrate;
140 } __packed;
141 
142 #define DATA_FORMAT_FIXED_POINT		1
143 #define PCM_LSB_ALIGNED			1
144 #define PCM_MSB_ALIGNED			2
145 #define PCM_LITTLE_ENDIAN		1
146 #define PCM_BIT_ENDIAN			2
147 
148 #define MEDIA_FMT_ID_PCM	0x09001000
149 #define PCM_CHANNEL_L		1
150 #define PCM_CHANNEL_R		2
151 #define SAMPLE_RATE_48K		48000
152 #define BIT_WIDTH_16		16
153 
154 #define APM_PARAM_ID_PROP_PORT_INFO		0x08001015
155 
156 struct apm_modules_prop_info {
157 	uint32_t max_ip_port;
158 	uint32_t max_op_port;
159 } __packed;
160 
161 /* Shared memory module */
162 #define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER	0x04001000
163 #define WR_SH_MEM_EP_TIMESTAMP_VALID_FLAG	BIT(31)
164 #define WR_SH_MEM_EP_LAST_BUFFER_FLAG		BIT(30)
165 #define WR_SH_MEM_EP_TS_CONTINUE_FLAG		BIT(29)
166 #define WR_SH_MEM_EP_EOF_FLAG			BIT(4)
167 
168 struct apm_data_cmd_wr_sh_mem_ep_data_buffer {
169 	uint32_t buf_addr_lsw;
170 	uint32_t buf_addr_msw;
171 	uint32_t mem_map_handle;
172 	uint32_t buf_size;
173 	uint32_t timestamp_lsw;
174 	uint32_t timestamp_msw;
175 	uint32_t flags;
176 } __packed;
177 
178 #define DATA_CMD_WR_SH_MEM_EP_DATA_BUFFER_V2	0x0400100A
179 
180 struct apm_data_cmd_wr_sh_mem_ep_data_buffer_v2 {
181 	uint32_t buf_addr_lsw;
182 	uint32_t buf_addr_msw;
183 	uint32_t mem_map_handle;
184 	uint32_t buf_size;
185 	uint32_t timestamp_lsw;
186 	uint32_t timestamp_msw;
187 	uint32_t flags;
188 	uint32_t md_addr_lsw;
189 	uint32_t md_addr_msw;
190 	uint32_t md_map_handle;
191 	uint32_t md_buf_size;
192 } __packed;
193 
194 #define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE	0x05001000
195 
196 struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done {
197 	uint32_t buf_addr_lsw;
198 	uint32_t buf_addr_msw;
199 	uint32_t mem_map_handle;
200 	uint32_t status;
201 
202 } __packed;
203 
204 #define DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2	0x05001004
205 
206 struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 {
207 	uint32_t buf_addr_lsw;
208 	uint32_t buf_addr_msw;
209 	uint32_t mem_map_handle;
210 	uint32_t status;
211 	uint32_t md_buf_addr_lsw;
212 	uint32_t md_buf_addr_msw;
213 	uint32_t md_mem_map_handle;
214 	uint32_t md_status;
215 } __packed;
216 
217 #define PARAM_ID_MEDIA_FORMAT				0x0800100C
218 #define DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT		0x04001001
219 
220 struct apm_media_format {
221 	uint32_t data_format;
222 	uint32_t fmt_id;
223 	uint32_t payload_size;
224 } __packed;
225 
226 #define DATA_CMD_WR_SH_MEM_EP_EOS			0x04001002
227 #define WR_SH_MEM_EP_EOS_POLICY_LAST	1
228 #define WR_SH_MEM_EP_EOS_POLICY_EACH	2
229 
230 struct data_cmd_wr_sh_mem_ep_eos {
231 	uint32_t policy;
232 
233 } __packed;
234 
235 #define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER		0x04001003
236 
237 struct data_cmd_rd_sh_mem_ep_data_buffer {
238 	uint32_t buf_addr_lsw;
239 	uint32_t buf_addr_msw;
240 	uint32_t mem_map_handle;
241 	uint32_t buf_size;
242 } __packed;
243 
244 #define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER		0x05001002
245 
246 struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done {
247 	uint32_t status;
248 	uint32_t buf_addr_lsw;
249 	uint32_t buf_addr_msw;
250 	uint32_t mem_map_handle;
251 	uint32_t data_size;
252 	uint32_t offset;
253 	uint32_t timestamp_lsw;
254 	uint32_t timestamp_msw;
255 	uint32_t flags;
256 	uint32_t num_frames;
257 } __packed;
258 
259 #define DATA_CMD_RD_SH_MEM_EP_DATA_BUFFER_V2		0x0400100B
260 
261 struct data_cmd_rd_sh_mem_ep_data_buffer_v2 {
262 	uint32_t buf_addr_lsw;
263 	uint32_t buf_addr_msw;
264 	uint32_t mem_map_handle;
265 	uint32_t buf_size;
266 	uint32_t md_buf_addr_lsw;
267 	uint32_t md_buf_addr_msw;
268 	uint32_t md_mem_map_handle;
269 	uint32_t md_buf_size;
270 } __packed;
271 
272 #define DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2	0x05001005
273 
274 struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 {
275 	uint32_t status;
276 	uint32_t buf_addr_lsw;
277 	uint32_t buf_addr_msw;
278 	uint32_t mem_map_handle;
279 	uint32_t data_size;
280 	uint32_t offset;
281 	uint32_t timestamp_lsw;
282 	uint32_t timestamp_msw;
283 	uint32_t flags;
284 	uint32_t num_frames;
285 	uint32_t md_status;
286 	uint32_t md_buf_addr_lsw;
287 	uint32_t md_buf_addr_msw;
288 	uint32_t md_mem_map_handle;
289 	uint32_t md_size;
290 } __packed;
291 
292 #define PARAM_ID_RD_SH_MEM_CFG				0x08001007
293 
294 struct param_id_rd_sh_mem_cfg {
295 	uint32_t num_frames_per_buffer;
296 	uint32_t metadata_control_flags;
297 
298 } __packed;
299 
300 #define DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED		0x05001001
301 
302 struct data_cmd_wr_sh_mem_ep_eos_rendered {
303 	uint32_t module_instance_id;
304 	uint32_t render_status;
305 } __packed;
306 
307 #define MODULE_ID_WR_SHARED_MEM_EP			0x07001000
308 
309 struct apm_cmd_header {
310 	uint32_t payload_address_lsw;
311 	uint32_t payload_address_msw;
312 	uint32_t mem_map_handle;
313 	uint32_t payload_size;
314 } __packed;
315 
316 #define APM_CMD_HDR_SIZE sizeof(struct apm_cmd_header)
317 
318 struct apm_module_param_data  {
319 	uint32_t module_instance_id;
320 	uint32_t param_id;
321 	uint32_t param_size;
322 	uint32_t error_code;
323 } __packed;
324 
325 #define APM_MODULE_PARAM_DATA_SIZE	sizeof(struct apm_module_param_data)
326 
327 struct apm_module_param_shared_data  {
328 	uint32_t param_id;
329 	uint32_t param_size;
330 } __packed;
331 
332 struct apm_prop_data {
333 	uint32_t prop_id;
334 	uint32_t prop_size;
335 } __packed;
336 
337 /* Sub-Graph Properties */
338 #define APM_PARAM_ID_SUB_GRAPH_CONFIG	0x08001001
339 
340 struct apm_param_id_sub_graph_cfg {
341 	uint32_t num_sub_graphs;
342 } __packed;
343 
344 struct apm_sub_graph_cfg {
345 	uint32_t sub_graph_id;
346 	uint32_t num_sub_graph_prop;
347 } __packed;
348 
349 #define APM_SUB_GRAPH_PROP_ID_PERF_MODE		0x0800100E
350 
351 struct apm_sg_prop_id_perf_mode {
352 	uint32_t perf_mode;
353 } __packed;
354 
355 #define APM_SG_PROP_ID_PERF_MODE_SIZE	4
356 
357 #define APM_SUB_GRAPH_PROP_ID_DIRECTION	0x0800100F
358 
359 struct apm_sg_prop_id_direction {
360 	uint32_t direction;
361 } __packed;
362 
363 #define APM_SG_PROP_ID_DIR_SIZE		4
364 
365 #define APM_SUB_GRAPH_PROP_ID_SCENARIO_ID	0x08001010
366 #define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK	0x1
367 #define APM_SUB_GRAPH_SID_AUDIO_RECORD		0x2
368 #define APM_SUB_GRAPH_SID_AUDIO_VOICE_CALL	0x3
369 
370 struct apm_sg_prop_id_scenario_id {
371 	uint32_t scenario_id;
372 } __packed;
373 
374 #define APM_SG_PROP_ID_SID_SIZE			4
375 /* container api */
376 #define APM_PARAM_ID_CONTAINER_CONFIG		0x08001000
377 
378 struct apm_param_id_container_cfg {
379 	uint32_t num_containers;
380 } __packed;
381 
382 struct apm_container_cfg {
383 	uint32_t container_id;
384 	uint32_t num_prop;
385 } __packed;
386 
387 struct apm_cont_capability  {
388 	uint32_t capability_id;
389 } __packed;
390 
391 #define APM_CONTAINER_PROP_ID_CAPABILITY_LIST	0x08001011
392 #define APM_CONTAINER_PROP_ID_CAPABILITY_SIZE	8
393 
394 #define APM_PROP_ID_INVALID			0x0
395 #define APM_CONTAINER_CAP_ID_PP			0x1
396 #define APM_CONTAINER_CAP_ID_PP			0x1
397 
398 struct apm_cont_prop_id_cap_list  {
399 	uint32_t num_capability_id;
400 } __packed;
401 
402 #define APM_CONTAINER_PROP_ID_GRAPH_POS		0x08001012
403 
404 struct apm_cont_prop_id_graph_pos  {
405 	uint32_t graph_pos;
406 } __packed;
407 
408 #define APM_CONTAINER_PROP_ID_STACK_SIZE	0x08001013
409 
410 struct apm_cont_prop_id_stack_size  {
411 	uint32_t stack_size;
412 } __packed;
413 
414 #define APM_CONTAINER_PROP_ID_PROC_DOMAIN	0x08001014
415 
416 struct apm_cont_prop_id_domain  {
417 	uint32_t proc_domain;
418 } __packed;
419 
420 #define CONFIG_I2S_WS_SRC_EXTERNAL		0x0
421 #define CONFIG_I2S_WS_SRC_INTERNAL		0x1
422 
423 #define PARAM_ID_I2S_INTF_CFG			0x08001019
424 struct param_id_i2s_intf_cfg {
425 	uint32_t lpaif_type;
426 	uint32_t intf_idx;
427 	uint16_t sd_line_idx;
428 	uint16_t ws_src;
429 } __packed;
430 
431 #define I2S_INTF_TYPE_PRIMARY		0
432 #define I2S_INTF_TYPE_SECOINDARY	1
433 #define I2S_INTF_TYPE_TERTINARY		2
434 #define I2S_INTF_TYPE_QUATERNARY	3
435 #define I2S_INTF_TYPE_QUINARY		4
436 #define I2S_SD0				1
437 #define I2S_SD1				2
438 #define I2S_SD2				3
439 #define I2S_SD3				4
440 
441 #define PORT_ID_I2S_INPUT		2
442 #define PORT_ID_I2S_OUPUT		1
443 #define I2S_STACK_SIZE			2048
444 
445 #define PARAM_ID_HW_EP_MF_CFG			0x08001017
446 struct param_id_hw_ep_mf {
447 	uint32_t sample_rate;
448 	uint16_t bit_width;
449 	uint16_t num_channels;
450 	uint32_t data_format;
451 } __packed;
452 
453 #define PARAM_ID_HW_EP_FRAME_SIZE_FACTOR	0x08001018
454 
455 struct param_id_fram_size_factor {
456 	uint32_t frame_size_factor;
457 } __packed;
458 
459 #define APM_CONTAINER_PROP_ID_PARENT_CONTAINER_ID	0x080010CB
460 
461 struct apm_cont_prop_id_parent_container  {
462 	uint32_t parent_container_id;
463 } __packed;
464 
465 #define APM_CONTAINER_PROP_ID_HEAP_ID			0x08001174
466 #define APM_CONT_HEAP_DEFAULT				0x1
467 #define APM_CONT_HEAP_LOW_POWER				0x2
468 
469 struct apm_cont_prop_id_headp_id  {
470 	uint32_t heap_id;
471 } __packed;
472 
473 struct apm_modules_list {
474 	uint32_t sub_graph_id;
475 	uint32_t container_id;
476 	uint32_t num_modules;
477 } __packed;
478 
479 struct apm_module_obj {
480 	uint32_t module_id;
481 	uint32_t instance_id;
482 } __packed;
483 
484 #define APM_MODULE_PROP_ID_PORT_INFO		0x08001015
485 #define APM_MODULE_PROP_ID_PORT_INFO_SZ		8
486 struct apm_module_prop_id_port_info {
487 	uint32_t max_ip_port;
488 	uint32_t max_op_port;
489 } __packed;
490 
491 #define DATA_LOGGING_MAX_INPUT_PORTS		0x1
492 #define DATA_LOGGING_MAX_OUTPUT_PORTS		0x1
493 #define DATA_LOGGING_STACK_SIZE			2048
494 #define PARAM_ID_DATA_LOGGING_CONFIG		0x08001031
495 
496 struct data_logging_config {
497 	uint32_t log_code;
498 	uint32_t log_tap_point_id;
499 	uint32_t mode;
500 } __packed;
501 
502 #define PARAM_ID_MFC_OUTPUT_MEDIA_FORMAT	0x08001024
503 
504 struct param_id_mfc_media_format {
505 	uint32_t sample_rate;
506 	uint16_t bit_width;
507 	uint16_t num_channels;
508 	uint16_t channel_mapping[];
509 } __packed;
510 
511 struct media_format {
512 	uint32_t data_format;
513 	uint32_t fmt_id;
514 	uint32_t payload_size;
515 } __packed;
516 
517 struct payload_media_fmt_pcm {
518 	uint32_t sample_rate;
519 	uint16_t bit_width;
520 	uint16_t alignment;
521 	uint16_t bits_per_sample;
522 	uint16_t q_factor;
523 	uint16_t endianness;
524 	uint16_t num_channels;
525 	uint8_t channel_mapping[];
526 } __packed;
527 
528 #define PARAM_ID_CODEC_DMA_INTF_CFG		0x08001063
529 
530 struct param_id_codec_dma_intf_cfg {
531 	/* 1 - RXTX
532 	 * 2 - WSA
533 	 * 3 - VA
534 	 * 4 - AXI
535 	 */
536 	uint32_t lpaif_type;
537 	/*
538 	 *  RX0 | TX0 = 1
539 	 *  RX1 | TX1 = 2
540 	 *  RX2 | TX2 = 3... so on
541 	 */
542 	uint32_t intf_index;
543 	uint32_t active_channels_mask;
544 } __packed;
545 
546 struct audio_hw_clk_cfg {
547 	uint32_t clock_id;
548 	uint32_t clock_freq;
549 	uint32_t clock_attri;
550 	uint32_t clock_root;
551 } __packed;
552 
553 struct audio_hw_clk_rel_cfg {
554 	uint32_t clock_id;
555 } __packed;
556 
557 #define PARAM_ID_HW_EP_POWER_MODE_CFG	0x8001176
558 #define AR_HW_EP_POWER_MODE_0	0 /* default */
559 #define AR_HW_EP_POWER_MODE_1	1 /* XO Shutdown allowed */
560 #define AR_HW_EP_POWER_MODE_2	2 /* XO Shutdown not allowed */
561 
562 struct param_id_hw_ep_power_mode_cfg {
563 	uint32_t power_mode;
564 } __packed;
565 
566 #define PARAM_ID_HW_EP_DMA_DATA_ALIGN	0x08001233
567 #define AR_HW_EP_DMA_DATA_ALIGN_MSB	0
568 #define AR_HW_EP_DMA_DATA_ALIGN_LSB	1
569 #define AR_PCM_MAX_NUM_CHANNEL		8
570 
571 struct param_id_hw_ep_dma_data_align {
572 	uint32_t dma_data_align;
573 } __packed;
574 
575 #define PARAM_ID_VOL_CTRL_MASTER_GAIN	0x08001035
576 #define VOL_CTRL_DEFAULT_GAIN		0x2000
577 
578 struct param_id_vol_ctrl_master_gain {
579 	uint16_t master_gain;
580 	uint16_t reserved;
581 } __packed;
582 
583 
584 /* Graph */
585 struct audioreach_connection {
586 	/* Connections */
587 	uint32_t src_mod_inst_id;
588 	uint32_t src_mod_op_port_id;
589 	uint32_t dst_mod_inst_id;
590 	uint32_t dst_mod_ip_port_id;
591 	struct list_head node;
592 };
593 
594 struct audioreach_graph_info {
595 	int id;
596 	uint32_t num_sub_graphs;
597 	struct list_head sg_list;
598 	struct list_head connection_list;
599 };
600 
601 struct audioreach_sub_graph {
602 	uint32_t sub_graph_id;
603 	uint32_t perf_mode;
604 	uint32_t direction;
605 	uint32_t scenario_id;
606 	struct list_head node;
607 
608 	struct audioreach_graph_info *info;
609 	uint32_t num_containers;
610 	struct list_head container_list;
611 };
612 
613 struct audioreach_container {
614 	uint32_t container_id;
615 	uint32_t capability_id;
616 	uint32_t graph_pos;
617 	uint32_t stack_size;
618 	uint32_t proc_domain;
619 	struct list_head node;
620 
621 	uint32_t num_modules;
622 	struct list_head modules_list;
623 	struct audioreach_sub_graph *sub_graph;
624 };
625 
626 struct audioreach_module {
627 	uint32_t module_id;
628 	uint32_t instance_id;
629 
630 	uint32_t max_ip_port;
631 	uint32_t max_op_port;
632 
633 	uint32_t in_port;
634 	uint32_t out_port;
635 
636 	/* Connections */
637 	uint32_t src_mod_inst_id;
638 	uint32_t src_mod_op_port_id;
639 	uint32_t dst_mod_inst_id;
640 	uint32_t dst_mod_ip_port_id;
641 
642 	/* Format specifics */
643 	uint32_t ch_fmt;
644 	uint32_t rate;
645 	uint32_t bit_depth;
646 
647 	/* I2S module */
648 	uint32_t hw_interface_idx;
649 	uint32_t sd_line_idx;
650 	uint32_t ws_src;
651 	uint32_t frame_size_factor;
652 	uint32_t data_format;
653 	uint32_t hw_interface_type;
654 
655 	/* PCM module specific */
656 	uint32_t interleave_type;
657 
658 	/* GAIN/Vol Control Module */
659 	uint16_t gain;
660 
661 	/* Logging */
662 	uint32_t log_code;
663 	uint32_t log_tap_point_id;
664 	uint32_t log_mode;
665 
666 	/* bookkeeping */
667 	struct list_head node;
668 	struct audioreach_container *container;
669 	struct snd_soc_dapm_widget *widget;
670 };
671 
672 struct audioreach_module_config {
673 	int	direction;
674 	u32	sample_rate;
675 	u16	bit_width;
676 	u16	bits_per_sample;
677 
678 	u16	data_format;
679 	u16	num_channels;
680 	u16	active_channels_mask;
681 	u32	sd_line_mask;
682 	int	fmt;
683 	u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];
684 };
685 
686 /* Packet Allocation routines */
687 void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t
688 				    token);
689 void *audioreach_alloc_cmd_pkt(int payload_size, uint32_t opcode,
690 			       uint32_t token, uint32_t src_port,
691 			       uint32_t dest_port);
692 void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token,
693 				uint32_t src_port);
694 void *audioreach_alloc_pkt(int payload_size, uint32_t opcode,
695 			   uint32_t token, uint32_t src_port,
696 			   uint32_t dest_port);
697 void *audioreach_alloc_graph_pkt(struct q6apm *apm,
698 				 struct list_head *sg_list,
699 				  int graph_id);
700 /* Topology specific */
701 int audioreach_tplg_init(struct snd_soc_component *component);
702 
703 /* Module specific */
704 void audioreach_graph_free_buf(struct q6apm_graph *graph);
705 int audioreach_map_memory_regions(struct q6apm_graph *graph,
706 				  unsigned int dir, size_t period_sz,
707 				  unsigned int periods,
708 				  bool is_contiguous);
709 int audioreach_send_cmd_sync(struct device *dev, gpr_device_t *gdev, struct gpr_ibasic_rsp_result_t *result,
710 			     struct mutex *cmd_lock, gpr_port_t *port, wait_queue_head_t *cmd_wait,
711 			     struct gpr_pkt *pkt, uint32_t rsp_opcode);
712 int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph, struct gpr_pkt *pkt,
713 				   uint32_t rsp_opcode);
714 int audioreach_set_media_format(struct q6apm_graph *graph,
715 				struct audioreach_module *module,
716 				struct audioreach_module_config *cfg);
717 int audioreach_shared_memory_send_eos(struct q6apm_graph *graph);
718 int audioreach_gain_set_vol_ctrl(struct q6apm *apm,
719 				 struct audioreach_module *module, int vol);
720 struct audioreach_module *audioreach_get_container_last_module(
721 				struct audioreach_container *container);
722 struct audioreach_module *audioreach_get_container_first_module(
723 				struct audioreach_container *container);
724 struct audioreach_module *audioreach_get_container_next_module(
725 				struct audioreach_container *container,
726 				struct audioreach_module *module);
727 #define list_for_each_container_module(mod, cont) \
728 	for (mod = audioreach_get_container_first_module(cont); mod != NULL; \
729 	     mod = audioreach_get_container_next_module(cont, mod))
730 #endif /* __AUDIOREACH_H__ */
731