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Searched refs:cfg_space (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/gvt/
Dcfg_space.c97 if (off == vgpu->cfg_space.pmcsr_off && vgpu->cfg_space.pmcsr_off) { in vgpu_pci_cfg_mem_write()
135 if (map != vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].tracked) in map_aperture()
136 vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].tracked = map; in map_aperture()
141 if (trap != vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].tracked) in trap_gttmmio()
142 vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].tracked = trap; in trap_gttmmio()
189 struct intel_vgpu_pci_bar *bars = vgpu->cfg_space.bar; in emulate_pci_bar_write()
328 memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, in intel_vgpu_init_cfg_space()
356 vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].size = in intel_vgpu_init_cfg_space()
358 vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size = in intel_vgpu_init_cfg_space()
364 vgpu->cfg_space.pmcsr_off = 0; in intel_vgpu_init_cfg_space()
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Dfirmware.c96 memcpy(gvt->firmware.cfg_space, i915->vgpu.initial_cfg_space, in expose_firmware_sysfs()
98 memcpy(p, gvt->firmware.cfg_space, info->cfg_space_size); in expose_firmware_sysfs()
139 kfree(gvt->firmware.cfg_space); in intel_gvt_free_firmware()
219 firmware->cfg_space = mem; in intel_gvt_load_firmware()
224 kfree(firmware->cfg_space); in intel_gvt_load_firmware()
252 memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset, in intel_gvt_load_firmware()
Dgvt.h110 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space)
195 struct intel_vgpu_cfg_space cfg_space; member
293 void *cfg_space; member
560 return (*(u64 *)(vgpu->cfg_space.virtual_cfg_space + bar)) & in intel_vgpu_get_bar_gpa()
DMakefile5 gvt/cfg_space.o \
Dkvmgt.c732 start_lo = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + bar)) & in intel_vgpu_get_bar_addr()
734 mem_type = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + bar)) & in intel_vgpu_get_bar_addr()
739 start_hi = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space in intel_vgpu_get_bar_addr()
1200 info.size = vgpu->cfg_space.bar[info.index].size; in intel_vgpu_ioctl()
/linux-6.1.9/arch/mips/pci/
Dpci-sb1250.c43 static void *cfg_space; variable
67 return *(u32 *) (cfg_space + (addr & ~3)); in READCFG32()
72 *(u32 *) (cfg_space + (addr & ~3)) = data; in WRITECFG32()
213 cfg_space = in sb1250_pcibios_init()
230 iounmap(cfg_space); in sb1250_pcibios_init()
Dpci-bcm1480.c43 static void *cfg_space; variable
57 return *(u32 *)(cfg_space + (addr&~3)); in READCFG32()
62 *(u32 *)(cfg_space + (addr & ~3)) = data; in WRITECFG32()
205 cfg_space = ioremap(A_BCM1480_PHYS_PCI_CFG_MATCH_BITS, 16*1024*1024); in bcm1480_pcibios_init()
219 iounmap(cfg_space); in bcm1480_pcibios_init()
/linux-6.1.9/arch/powerpc/platforms/4xx/
Dpci.c646 struct resource cfg_space; member
1242 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc460sx_pciex_check_link()
1375 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000, in ppc_476fpe_pciex_check_link()
1466 RES_TO_U32_HIGH(port->cfg_space.start)); in ppc4xx_pciex_port_init_mapping()
1468 RES_TO_U32_LOW(port->cfg_space.start)); in ppc4xx_pciex_port_init_mapping()
1959 cfg_data = ioremap(port->cfg_space.start + in ppc4xx_pciex_port_setup_hose()
1973 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); in ppc4xx_pciex_port_setup_hose()
2138 if (of_address_to_resource(np, 0, &port->cfg_space)) { in ppc4xx_probe_pciex_bridge()