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Searched refs:cfgBIF_CFG_DEV0_RC0_PCIE_LANE_15_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_0_offset.h246 #define cfgBIF_CFG_DEV0_RC0_PCIE_LANE_15_EQUALIZATION_CNTL … macro
Dnbio_4_3_0_offset.h2860 #define cfgBIF_CFG_DEV0_RC0_PCIE_LANE_15_EQUALIZATION_CNTL … macro