Searched refs:cachelines (Results 1 – 11 of 11) sorted by relevance
33 for cachelines with highest contention - highest number of HITM accesses.169 - sort all cachelines based on user settings173 1) most expensive cachelines list198 - sum of all cachelines accesses308 - overall statistics on shared cachelines311 - list of most expensive cachelines319 through cachelines list and to display offset details.
21 multi-CPU system these may be on cachelines that keep bouncing
26 multi-CPU system these may be on cachelines that keep bouncing
67 struct radix_tree_root cachelines; member83 radix_tree_delete(&state->cachelines, hwsp_cacheline(tl)); in __mock_hwsp_record()111 err = radix_tree_insert(&state->cachelines, cacheline, tl); in __mock_hwsp_timeline()161 INIT_RADIX_TREE(&state.cachelines, GFP_KERNEL); in mock_hwsp_freelist()
9 CXL.mem). The CXL.cache protocol allows devices to hold cachelines
40 be full sized. Variables that straddle cachelines or pages void
287 objects are aligned on cachelines.
36 even stores into cachelines of common dentries). This is known as "rcu-walk"
696 dirty only the log item cachelines. Normally I wouldn't be concerned about one697 vs two dirty cachelines except for the fact I've seen upwards of 80,000 log
375 block. Interrupts are also disabled to avoid races where cachelines
1039 https://lore.kernel.org/r/40AC9823.6020709@colorfullife.com (split vars into cachelines)