/linux-6.1.9/arch/mips/mm/ |
D | page.c | 99 static int cache_line_size; variable 100 #define cache_line_mask() (cache_line_size - 1) 148 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters() 217 cache_line_size = cpu_scache_line_size(); in set_prefetch_parameters() 219 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters() 226 max(cache_line_size >> 1, in set_prefetch_parameters() 229 max(cache_line_size >> 1, in set_prefetch_parameters() 250 } else if (cache_line_size == (half_clear_loop_size << 1)) { in build_clear_pref() 311 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) in build_clear_page() 312 * cache_line_size : 0; in build_clear_page() [all …]
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/linux-6.1.9/tools/perf/util/ |
D | cacheline.c | 6 #define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE) macro 10 static void cache_line_size(int *cacheline_sizep) in cache_line_size() function 22 cache_line_size(&size); in cacheline_size()
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/linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/ |
D | alloc.c | 136 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_alloc_db_pgdir() 165 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_alloc_db_from_pgdir() 177 offset = db->index * cache_line_size(); in mlx5_alloc_db_from_pgdir() 218 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_db_free()
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/linux-6.1.9/arch/arm64/kernel/ |
D | cacheinfo.c | 20 int cache_line_size(void) in cache_line_size() function 27 EXPORT_SYMBOL_GPL(cache_line_size);
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/linux-6.1.9/drivers/s390/cio/ |
D | airq.c | 143 if ((cache_line_size() * BITS_PER_BYTE) < bits in airq_iv_create() 310 cache_line_size(), in airq_init() 311 cache_line_size(), PAGE_SIZE); in airq_init()
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/linux-6.1.9/drivers/infiniband/sw/rxe/ |
D | rxe_queue.c | 77 if (elem_size < cache_line_size()) in rxe_queue_init() 78 elem_size = cache_line_size(); in rxe_queue_init()
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/linux-6.1.9/include/linux/ |
D | cache.h | 85 #define cache_line_size() L1_CACHE_BYTES macro
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D | pci-epf.h | 55 u8 cache_line_size; member
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/linux-6.1.9/arch/arc/include/asm/ |
D | cache.h | 51 #define cache_line_size() SMP_CACHE_BYTES macro
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/linux-6.1.9/arch/arm64/include/asm/ |
D | cache.h | 82 int cache_line_size(void);
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/linux-6.1.9/drivers/scsi/cxlflash/ |
D | common.h | 173 } __aligned(cache_line_size()); 228 } __aligned(cache_line_size());
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D | sislite.h | 480 char carea[cache_line_size()]; /* 128B each */
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/linux-6.1.9/Documentation/PCI/endpoint/function/binding/ |
D | pci-test.rst | 18 cache_line_size don't care
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D | pci-ntb.rst | 18 cache_line_size don't care
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/linux-6.1.9/arch/um/include/asm/ |
D | processor-generic.h | 96 #define cache_line_size() (boot_cpu_data.cache_alignment) macro
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/linux-6.1.9/Documentation/PCI/endpoint/ |
D | pci-endpoint-cfs.rst | 68 ... cache_line_size 132 | cache_line_size
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/linux-6.1.9/drivers/pci/endpoint/ |
D | pci-ep-cfs.c | 425 PCI_EPF_HEADER_R(cache_line_size) 426 PCI_EPF_HEADER_W_u8(cache_line_size) 443 CONFIGFS_ATTR(pci_epf_, cache_line_size);
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/linux-6.1.9/drivers/pci/ |
D | pci-acpi.c | 125 u8 cache_line_size; /* Not applicable to PCIe */ member 133 .cache_line_size = 8, 152 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size); in program_hpx_type0() 187 hpx0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record() 731 hpx0.cache_line_size = fields[0].integer.value; in acpi_run_hpp()
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D | pci-bridge-emul.h | 14 u8 cache_line_size; member
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/linux-6.1.9/tools/virtio/ringtest/ |
D | ptr_ring.c | 14 #define cache_line_size() SMP_CACHE_BYTES macro
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/ |
D | dcn32_resource_helpers.c | 127 cache_lines_per_plane = bytes_in_mall / dc->caps.cache_line_size + 2; in dcn32_helper_calculate_num_ways_for_subvp() 136 total_cache_lines = dc->caps.max_cab_allocation_bytes / dc->caps.cache_line_size; in dcn32_helper_calculate_num_ways_for_subvp()
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/linux-6.1.9/arch/powerpc/kernel/ |
D | eeh_pe.c | 54 alloc_size = ALIGN(alloc_size, cache_line_size()); in eeh_pe_alloc() 69 cache_line_size()); in eeh_pe_alloc()
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/linux-6.1.9/drivers/gpu/drm/amd/amdkfd/ |
D | kfd_crat.h | 167 uint16_t cache_line_size; member
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/linux-6.1.9/include/uapi/rdma/ |
D | mlx5-abi.h | 138 __u32 cache_line_size; member
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/linux-6.1.9/drivers/staging/vc04_services/interface/vchiq_arm/ |
D | vchiq_arm.c | 72 const unsigned int cache_line_size; member 77 .cache_line_size = 32, 81 .cache_line_size = 64, 486 g_cache_line_size = drvdata->cache_line_size; in vchiq_platform_init()
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