| /linux-6.1.9/drivers/staging/rtl8723bs/hal/ |
| D | rtl8723b_phycfg.c | 459 PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
462 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
475 PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
488 PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
501 PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
514 PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
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| /linux-6.1.9/drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 134 #define bMaskByte1 0xff00 macro
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| D | r8192U_dm.c | 1537 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1552 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1565 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_backup()
1673 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_driverrssi()
1711 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1746 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1836 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
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| D | r819xU_phy.c | 1659 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1698 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1727 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in InitialGainOperateWorkItemCallBack()
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| /linux-6.1.9/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phy.h | 51 #define bMaskByte1 0xff00 macro
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| D | rtl_dm.c | 1098 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_bb_initialgain_restore()
1110 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_bb_initialgain_restore()
1125 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_dm_backup_state()
1209 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_driver()
1242 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1261 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1312 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
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| D | r8192E_phy.c | 1237 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
1264 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
1283 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in rtl92e_init_gain()
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| D | r8192E_phyreg.h | 831 #define bMaskByte1 0xff00 macro
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| /linux-6.1.9/drivers/staging/r8188eu/hal/ |
| D | rtl8188e_rf6052.c | 141 rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); in rtl8188e_PHY_RF6052SetCckTxPower()
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| D | odm_RTL8188E.c | 85 rtl8188e_PHY_SetBBReg(adapter, 0x914, bMaskByte1, 2); in odm_FastAntTrainingInit()
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| /linux-6.1.9/drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 969 #define bMaskByte1 0xff00 macro
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| /linux-6.1.9/drivers/staging/r8188eu/include/ |
| D | Hal8188EPhyReg.h | 1026 #define bMaskByte1 0xff00 macro
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| /linux-6.1.9/drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 1059 #define bMaskByte1 0xff00 macro
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