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Searched refs:alpha_en (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_dpp.c54 uint32_t alpha_en = 1; in dpp201_cnv_setup() local
75 alpha_en = 0; in dpp201_cnv_setup()
126 alpha_en = 0; in dpp201_cnv_setup()
130 alpha_en = 0; in dpp201_cnv_setup()
146 alpha_en = 0; in dpp201_cnv_setup()
150 alpha_en = 0; in dpp201_cnv_setup()
168 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp201_cnv_setup()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp.c105 uint32_t alpha_en = 1; in dpp2_cnv_setup() local
133 alpha_en = 0; in dpp2_cnv_setup()
185 alpha_en = 0; in dpp2_cnv_setup()
189 alpha_en = 0; in dpp2_cnv_setup()
205 alpha_en = 0; in dpp2_cnv_setup()
209 alpha_en = 0; in dpp2_cnv_setup()
227 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp2_cnv_setup()
304 if (scl_data->lb_params.alpha_en in dscl2_calc_lb_num_partitions()
Ddcn20_hwseq.c1533 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->plane_state->per_pixel_alpha; in dcn20_update_dchubp_dpp()
/linux-6.1.9/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c111 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),
129 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
198 .alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
288 .alpha_en = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 0),
305 .alpha_en = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 0),
322 .alpha_en = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 0),
385 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),
404 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),
419 .alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),
507 .alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0),
[all …]
Drockchip_drm_vop.h200 struct vop_reg alpha_en; member
Drockchip_drm_vop.c1041 VOP_WIN_SET(vop, win, alpha_en, 1); in vop_plane_atomic_update()
1044 VOP_WIN_SET(vop, win, alpha_en, 0); in vop_plane_atomic_update()
Drockchip_drm_vop2.c118 u32 alpha_en:1; member
1676 alpha->src_color_ctrl.bits.alpha_en = 1; in vop2_parse_alpha()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp.c283 uint32_t alpha_en; in dpp1_cnv_setup() local
294 alpha_en = 1; in dpp1_cnv_setup()
329 alpha_en = 0; in dpp1_cnv_setup()
382 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp1_cnv_setup()
Ddcn10_dpp_dscl.c202 LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ in dpp1_dscl_set_lb()
208 LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ in dpp1_dscl_set_lb()
443 if (scl_data->lb_params.alpha_en in dpp1_dscl_calc_lb_num_partitions()
Ddcn10_hw_sequencer.c2686 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dpp.c97 if (scl_data->lb_params.alpha_en in dscl32_calc_lb_num_partitions()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dtransform.h154 bool alpha_en; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_hw_sequencer.c312 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce60_program_front_end_for_pipe()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.c180 uint32_t alpha_en = 1; in dpp3_cnv_setup() local
211 alpha_en = 0; in dpp3_cnv_setup()
310 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp3_cnv_setup()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_transform.c486 REG_UPDATE(LB_DATA_FORMAT, ALPHA_EN, data->lb_params.alpha_en); in dce_transform_set_scaler()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.c1606 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in apply_single_controller_ctx_to_hw()
2725 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c1178 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; in resource_build_scaling_params()