/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_debugfs.c | 117 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 119 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 125 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 132 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 133 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 182 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 183 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op() 240 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs2_op() 242 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs2_op() 248 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs2_op() [all …]
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D | amdgpu_vkms.c | 491 adev_to_drm(adev)->max_vblank_count = 0; in amdgpu_vkms_sw_init() 493 adev_to_drm(adev)->mode_config.funcs = &amdgpu_vkms_mode_funcs; in amdgpu_vkms_sw_init() 495 adev_to_drm(adev)->mode_config.max_width = XRES_MAX; in amdgpu_vkms_sw_init() 496 adev_to_drm(adev)->mode_config.max_height = YRES_MAX; in amdgpu_vkms_sw_init() 498 adev_to_drm(adev)->mode_config.preferred_depth = 24; in amdgpu_vkms_sw_init() 499 adev_to_drm(adev)->mode_config.prefer_shadow = 1; in amdgpu_vkms_sw_init() 501 adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base; in amdgpu_vkms_sw_init() 503 adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true; in amdgpu_vkms_sw_init() 511 r = amdgpu_vkms_output_init(adev_to_drm(adev), &adev->amdgpu_vkms_output[i], i); in amdgpu_vkms_sw_init() 516 drm_kms_helper_poll_init(adev_to_drm(adev)); in amdgpu_vkms_sw_init() [all …]
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D | amdgpu_irq.c | 123 struct drm_device *dev = adev_to_drm(adev); in amdgpu_hotplug_work_func() 324 adev_to_drm(adev)->vblank_disable_immediate = true; in amdgpu_irq_init() 326 r = drm_vblank_init(adev_to_drm(adev), adev->mode_info.num_crtc); in amdgpu_irq_init() 346 r = request_irq(irq, amdgpu_irq_handler, IRQF_SHARED, adev_to_drm(adev)->driver->name, in amdgpu_irq_init() 347 adev_to_drm(adev)); in amdgpu_irq_init() 355 adev_to_drm(adev)->max_vblank_count = 0x00ffffff; in amdgpu_irq_init() 365 free_irq(adev->irq.irq, adev_to_drm(adev)); in amdgpu_irq_fini_hw()
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D | amdgpu_rap.c | 49 struct drm_device *dev = adev_to_drm(adev); in amdgpu_rap_debugfs_write() 120 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_rap_debugfs_init()
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D | amdgpu_dma_buf.c | 64 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_dma_buf_attach() 71 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_dma_buf_attach() 90 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_dma_buf_detach() 91 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_dma_buf_detach()
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D | amdgpu_display.c | 102 (amdgpu_display_get_crtc_scanoutpos(adev_to_drm(adev), work->crtc_id, 0, in amdgpu_display_flip_work_func() 124 drm_dbg_vbl(adev_to_drm(adev), in amdgpu_display_flip_work_func() 1243 drm_property_create_range(adev_to_drm(adev), 0, "coherent", 0, 1); in amdgpu_display_modeset_create_props() 1248 drm_property_create_range(adev_to_drm(adev), 0, "load detection", 0, 1); in amdgpu_display_modeset_create_props() 1252 drm_mode_create_scaling_mode_property(adev_to_drm(adev)); in amdgpu_display_modeset_create_props() 1256 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props() 1261 drm_property_create_range(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props() 1267 drm_property_create_range(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props() 1274 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props() 1280 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props() [all …]
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D | amdgpu_fence.c | 185 pm_runtime_get_noresume(adev_to_drm(adev)->dev); in amdgpu_fence_emit() 309 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_fence_process() 310 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_fence_process() 523 if (!drm_dev_is_unplugged(adev_to_drm(adev))) in amdgpu_fence_driver_hw_fini() 817 struct drm_device *dev = adev_to_drm(adev); in gpu_recover_get() 861 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_fence_init()
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D | amdgpu_securedisplay.c | 97 struct drm_device *dev = adev_to_drm(adev); in amdgpu_securedisplay_debugfs_write() 176 debugfs_create_file("securedisplay_test", S_IWUSR, adev_to_drm(adev)->primary->debugfs_root, in amdgpu_securedisplay_debugfs_init()
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D | dce_v8_0.c | 277 struct drm_device *dev = adev_to_drm(adev); in dce_v8_0_hpd_init() 322 struct drm_device *dev = adev_to_drm(adev); in dce_v8_0_hpd_fini() 2608 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v8_0_crtc_funcs); in dce_v8_0_crtc_init() 2616 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v8_0_crtc_init() 2617 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v8_0_crtc_init() 2688 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v8_0_sw_init() 2690 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v8_0_sw_init() 2692 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v8_0_sw_init() 2693 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v8_0_sw_init() 2695 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v8_0_sw_init() [all …]
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D | amdgpu_gart.c | 167 if (!drm_dev_enter(adev_to_drm(adev), &idx)) in amdgpu_gart_unbind() 212 if (!drm_dev_enter(adev_to_drm(adev), &idx)) in amdgpu_gart_map()
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D | dce_v6_0.c | 283 struct drm_device *dev = adev_to_drm(adev); in dce_v6_0_hpd_init() 328 struct drm_device *dev = adev_to_drm(adev); in dce_v6_0_hpd_fini() 2593 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v6_0_crtc_funcs); in dce_v6_0_crtc_init() 2601 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v6_0_crtc_init() 2602 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v6_0_crtc_init() 2671 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v6_0_sw_init() 2672 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v6_0_sw_init() 2673 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v6_0_sw_init() 2674 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v6_0_sw_init() 2675 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v6_0_sw_init() [all …]
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D | dce_v10_0.c | 332 struct drm_device *dev = adev_to_drm(adev); in dce_v10_0_hpd_init() 387 struct drm_device *dev = adev_to_drm(adev); in dce_v10_0_hpd_fini() 2700 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v10_0_crtc_funcs); in dce_v10_0_crtc_init() 2708 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v10_0_crtc_init() 2709 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v10_0_crtc_init() 2791 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v10_0_sw_init() 2793 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v10_0_sw_init() 2795 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v10_0_sw_init() 2796 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v10_0_sw_init() 2798 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v10_0_sw_init() [all …]
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D | amdgpu_acpi.c | 452 pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_atif_handler() 454 drm_helper_hpd_irq_event(adev_to_drm(adev)); in amdgpu_atif_handler() 455 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_atif_handler() 456 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_atif_handler() 861 list_for_each_entry(tmp, &adev_to_drm(adev)->mode_config.encoder_list, in amdgpu_acpi_init()
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D | dce_v11_0.c | 350 struct drm_device *dev = adev_to_drm(adev); in dce_v11_0_hpd_init() 404 struct drm_device *dev = adev_to_drm(adev); in dce_v11_0_hpd_fini() 2805 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v11_0_crtc_funcs); in dce_v11_0_crtc_init() 2813 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v11_0_crtc_init() 2814 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v11_0_crtc_init() 2909 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v11_0_sw_init() 2911 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v11_0_sw_init() 2913 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v11_0_sw_init() 2914 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v11_0_sw_init() 2916 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v11_0_sw_init() [all …]
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D | amdgpu_device.c | 313 if (!drm_dev_enter(adev_to_drm(adev), &idx)) in amdgpu_device_mm_access() 2070 struct drm_device *dev = adev_to_drm(adev); in amdgpu_device_ip_early_init() 3386 adev->asic_reset_res = amdgpu_device_baco_enter(adev_to_drm(adev)); in amdgpu_device_xgmi_reset_func() 3392 adev->asic_reset_res = amdgpu_device_baco_exit(adev_to_drm(adev)); in amdgpu_device_xgmi_reset_func() 3409 adev->asic_reset_res, adev_to_drm(adev)->unique); in amdgpu_device_xgmi_reset_func() 3521 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_device_init() 3803 drm_mode_config_init(adev_to_drm(adev)); in amdgpu_device_init() 3983 if (!drm_drv_uses_atomic_modeset(adev_to_drm(adev))) in amdgpu_device_fini_hw() 3984 drm_helper_force_disable_all(adev_to_drm(adev)); in amdgpu_device_fini_hw() 3986 drm_atomic_helper_shutdown(adev_to_drm(adev)); in amdgpu_device_fini_hw() [all …]
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D | amdgpu_fw_attestation.c | 140 adev_to_drm(adev)->primary->debugfs_root, in amdgpu_fw_attestation_debugfs_init()
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D | amdgpu_amdkfd.c | 156 .drm_render_minor = adev_to_drm(adev)->render->index, in amdgpu_amdkfd_device_init() 198 adev_to_drm(adev), &gpu_resources); in amdgpu_amdkfd_device_init() 517 if (obj->dev->driver != adev_to_drm(adev)->driver) in amdgpu_amdkfd_get_dmabuf_info()
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D | amdgpu_gem.c | 131 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_gem_force_release() 950 struct drm_device *dev = adev_to_drm(adev); in amdgpu_debugfs_gem_info_show() 995 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_gem_init()
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D | amdgpu_drv.c | 2131 ddev = adev_to_drm(adev); in amdgpu_pci_probe() 2162 !list_empty(&adev_to_drm(adev)->mode_config.connector_list)) { in amdgpu_pci_probe() 2165 drm_fbdev_generic_setup(adev_to_drm(adev), 8); in amdgpu_pci_probe() 2167 drm_fbdev_generic_setup(adev_to_drm(adev), 32); in amdgpu_pci_probe() 2331 r, adev_to_drm(adev)->unique); in amdgpu_drv_delayed_reset_work_handler()
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D | amdgpu_psp_ta.c | 285 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_ta_if_debugfs_init()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/ |
D | amdgpu_pm.c | 1644 adev_to_drm(adev)->unique, in amdgpu_get_thermal_throttling_logging() 1740 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_device_read_powershift() 1892 if (!amdgpu_device_supports_smart_shift(adev_to_drm(adev))) in ss_power_attr_update() 1903 if (!amdgpu_device_supports_smart_shift(adev_to_drm(adev))) in ss_bias_attr_update() 2177 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp() 2179 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp() 2204 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp() 2205 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp() 2312 ret = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable() 2314 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable() [all …]
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D | amdgpu_dpm_internal.c | 32 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_dpm_get_active_displays() 52 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dpm_get_vblank_time() 79 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dpm_get_vrefresh()
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/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm.c | 331 struct drm_device *dev = adev_to_drm(adev); in get_crtc_by_otg_inst() 385 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq() 393 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq() 443 list_add_tail(&e->base.link, &adev_to_drm(adev)->vblank_event_list); in dm_pflip_high_irq() 456 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq() 506 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_vupdate_high_irq() 516 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_vupdate_high_irq() 565 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_crtc_high_irq() 600 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_crtc_high_irq() 1436 adev->dm.ddev = adev_to_drm(adev); in amdgpu_dm_init() [all …]
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D | amdgpu_dm_plane.c | 338 drm_dbg_kms(adev_to_drm(adev), "validate_dcc: returned error: %d\n", ret); in fill_gfx9_plane_attributes_from_modifiers() 1485 ret = atomic_replace_property_blob_from_id(adev_to_drm(adev), in dm_drm_plane_set_property() 1490 ret = atomic_replace_property_blob_from_id(adev_to_drm(adev), in dm_drm_plane_set_property() 1560 adev_to_drm(dm->adev)->mode_config.fb_modifiers_not_supported = true; in amdgpu_dm_plane_init() 1562 res = drm_universal_plane_init(adev_to_drm(dm->adev), plane, possible_crtcs, in amdgpu_dm_plane_init()
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D | amdgpu_dm_irq.c | 885 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dm_hpd_init() 921 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dm_hpd_fini()
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