| /linux-6.1.9/drivers/iio/adc/ |
| D | palmas_gpadc.c | 146 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument
150 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
155 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion()
159 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
165 dev_err(adc->dev, "AUTO_CTRL update failed: %d\n", ret); in palmas_disable_auto_conversion()
171 ret = palmas_update_bits(adc->palmas, PALMAS_GPADC_BASE, in palmas_disable_auto_conversion()
175 dev_err(adc->dev, "GPADC_CTRL1 update failed: %d\n", ret); in palmas_disable_auto_conversion()
182 struct palmas_gpadc *adc = data; in palmas_gpadc_irq() local
184 complete(&adc->conv_completion); in palmas_gpadc_irq()
191 struct palmas_gpadc *adc = data; in palmas_gpadc_irq_auto() local
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| D | stm32-adc.c | 530 static u32 stm32_adc_readl(struct stm32_adc *adc, u32 reg) in stm32_adc_readl() argument
532 return readl_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readl()
535 #define stm32_adc_readl_addr(addr) stm32_adc_readl(adc, addr)
541 static u16 stm32_adc_readw(struct stm32_adc *adc, u32 reg) in stm32_adc_readw() argument
543 return readw_relaxed(adc->common->base + adc->offset + reg); in stm32_adc_readw()
546 static void stm32_adc_writel(struct stm32_adc *adc, u32 reg, u32 val) in stm32_adc_writel() argument
548 writel_relaxed(val, adc->common->base + adc->offset + reg); in stm32_adc_writel()
551 static void stm32_adc_set_bits(struct stm32_adc *adc, u32 reg, u32 bits) in stm32_adc_set_bits() argument
555 spin_lock_irqsave(&adc->lock, flags); in stm32_adc_set_bits()
556 stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits); in stm32_adc_set_bits()
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| D | ti-adc12138.c | 128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument
132 .tx_buf = adc->tx_buf, in adc12138_mode_programming()
133 .rx_buf = adc->rx_buf, in adc12138_mode_programming()
139 if (adc->id != adc12138) in adc12138_mode_programming()
142 adc->tx_buf[0] = mode; in adc12138_mode_programming()
144 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming()
148 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming()
153 static int adc12138_read_status(struct adc12138 *adc) in adc12138_read_status() argument
158 ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS, in adc12138_read_status()
166 static int __adc12138_start_conv(struct adc12138 *adc, in __adc12138_start_conv() argument
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| D | mcp3911.c | 82 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
86 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
87 ret = spi_write_then_read(adc->spi, ®, 1, val, len); in mcp3911_read()
93 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val, in mcp3911_read()
98 static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len) in mcp3911_write() argument
100 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write()
104 val |= MCP3911_REG_WRITE(reg, adc->dev_addr); in mcp3911_write()
106 return spi_write(adc->spi, &val, len + 1); in mcp3911_write()
109 static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, in mcp3911_update() argument
115 ret = mcp3911_read(adc, reg, &tmp, len); in mcp3911_update()
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| D | imx8qxp-adc.c | 120 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
125 ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
127 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
130 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
134 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
137 static void imx8qxp_adc_reg_config(struct imx8qxp_adc *adc, int channel) in imx8qxp_adc_reg_config() argument
147 writel(adc_cfg, adc->regs + IMX8QXP_ADR_ADC_CFG); in imx8qxp_adc_reg_config()
154 writel(adc_tctrl, adc->regs + IMX8QXP_ADR_ADC_TCTRL(0)); in imx8qxp_adc_reg_config()
162 writel(adc_cmdl, adc->regs + IMX8QXP_ADR_ADC_CMDL(0)); in imx8qxp_adc_reg_config()
170 writel(adc_cmdh, adc->regs + IMX8QXP_ADR_ADC_CMDH(0)); in imx8qxp_adc_reg_config()
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| D | stm32-dfsdm-adc.c | 315 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_compute_all_osrs() local
316 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; in stm32_dfsdm_compute_all_osrs()
336 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_start_channel() local
337 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_start_channel()
342 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_start_channel()
356 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_stop_channel() local
357 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_stop_channel()
361 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_stop_channel()
391 static int stm32_dfsdm_start_filter(struct stm32_dfsdm_adc *adc, in stm32_dfsdm_start_filter() argument
395 struct stm32_dfsdm *dfsdm = adc->dfsdm; in stm32_dfsdm_start_filter()
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| D | rzg2l_adc.c | 93 static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg) in rzg2l_adc_readl() argument
95 return readl(adc->base + reg); in rzg2l_adc_readl()
98 static void rzg2l_adc_writel(struct rzg2l_adc *adc, unsigned int reg, u32 val) in rzg2l_adc_writel() argument
100 writel(val, adc->base + reg); in rzg2l_adc_writel()
103 static void rzg2l_adc_pwr(struct rzg2l_adc *adc, bool on) in rzg2l_adc_pwr() argument
107 reg = rzg2l_adc_readl(adc, RZG2L_ADM(0)); in rzg2l_adc_pwr()
112 rzg2l_adc_writel(adc, RZG2L_ADM(0), reg); in rzg2l_adc_pwr()
116 static void rzg2l_adc_start_stop(struct rzg2l_adc *adc, bool start) in rzg2l_adc_start_stop() argument
121 reg = rzg2l_adc_readl(adc, RZG2L_ADM(0)); in rzg2l_adc_start_stop()
126 rzg2l_adc_writel(adc, RZG2L_ADM(0), reg); in rzg2l_adc_start_stop()
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| D | max1241.c | 42 static int max1241_read(struct max1241 *adc) in max1241_read() argument
58 .rx_buf = &adc->data, in max1241_read()
63 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
71 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
75 mutex_lock(&adc->lock); in max1241_read_raw()
77 if (adc->shutdown) { in max1241_read_raw()
78 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
80 ret = max1241_read(adc); in max1241_read_raw()
81 gpiod_set_value(adc->shutdown, 1); in max1241_read_raw()
83 ret = max1241_read(adc); in max1241_read_raw()
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| D | mcp320x.c | 120 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
125 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
126 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
130 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
131 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
134 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
135 if (adc->chip_info->num_channels > 1) in mcp320x_adc_conversion()
136 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel, in mcp320x_adc_conversion()
139 ret = spi_sync(adc->spi, &adc->msg); in mcp320x_adc_conversion()
145 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3); in mcp320x_adc_conversion()
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| D | ingenic-adc.c | 102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
121 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
128 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
134 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
142 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
148 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
155 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
160 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
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| D | ti-adc084s021.c | 73 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
79 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
84 *(data + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
93 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local
103 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
109 adc->tx_buf[0] = channel->channel << 3; in adc084s021_read_raw()
110 ret = adc084s021_adc_conversion(adc, &be_val); in adc084s021_read_raw()
112 regulator_disable(adc->reg); in adc084s021_read_raw()
121 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
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| D | qcom-spmi-adc5.c | 158 static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_read() argument
160 return regmap_bulk_read(adc->regmap, adc->base + offset, data, len); in adc5_read()
163 static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_write() argument
165 return regmap_bulk_write(adc->regmap, adc->base + offset, data, len); in adc5_write()
168 static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val) in adc5_masked_write() argument
170 return regmap_update_bits(adc->regmap, adc->base + offset, mask, val); in adc5_masked_write()
173 static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data) in adc5_read_voltage_data() argument
178 ret = adc5_read(adc, ADC5_USR_DATA0, &rslt_lsb, sizeof(rslt_lsb)); in adc5_read_voltage_data()
182 ret = adc5_read(adc, ADC5_USR_DATA1, &rslt_msb, sizeof(rslt_lsb)); in adc5_read_voltage_data()
189 dev_err(adc->dev, "Invalid data:0x%x\n", *data); in adc5_read_voltage_data()
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| D | ti-adc0832.c | 120 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
122 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
125 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
132 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
135 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
138 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
140 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
141 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
146 if (!adc->mux_bits) in adc0832_adc_conversion()
147 return adc0831_adc_conversion(adc); in adc0832_adc_conversion()
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| D | lpc18xx_adc.c | 69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
74 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
75 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
77 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
80 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
91 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
95 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
96 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
97 mutex_unlock(&adc->lock); in lpc18xx_adc_read_raw()
104 *val = regulator_get_voltage(adc->vref) / 1000; in lpc18xx_adc_read_raw()
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| D | mxs-lradc-adc.c | 134 struct mxs_lradc_adc *adc = iio_priv(iio_dev); in mxs_lradc_adc_read_single() local
135 struct mxs_lradc *lradc = adc->lradc; in mxs_lradc_adc_read_single()
148 reinit_completion(&adc->completion); in mxs_lradc_adc_read_single()
157 adc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
158 writel(0x1, adc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
161 if (test_bit(chan, &adc->is_divided)) in mxs_lradc_adc_read_single()
163 adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET); in mxs_lradc_adc_read_single()
166 adc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
170 adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR); in mxs_lradc_adc_read_single()
171 writel(chan, adc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET); in mxs_lradc_adc_read_single()
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| D | qcom-pm8xxx-xoadc.c | 419 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); in pm8xxx_eoc_irq() local
421 complete(&adc->complete); in pm8xxx_eoc_irq()
427 pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan) in pm8xxx_get_channel() argument
431 for (i = 0; i < adc->nchans; i++) { in pm8xxx_get_channel()
432 struct pm8xxx_chan_info *ch = &adc->chans[i]; in pm8xxx_get_channel()
439 static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc, in pm8xxx_read_channel_rsv() argument
449 dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n", in pm8xxx_read_channel_rsv()
452 mutex_lock(&adc->lock); in pm8xxx_read_channel_rsv()
457 ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val); in pm8xxx_read_channel_rsv()
464 if (adc->variant->broken_ratiometric && !force_ratiometric) { in pm8xxx_read_channel_rsv()
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| D | ti-ads8344.c | 76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
98 return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7; in ads8344_adc_conversion()
105 struct ads8344 *adc = iio_priv(iio); in ads8344_read_raw() local
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| D | rn5t618-adc.c | 83 struct rn5t618_adc_data *adc = data; in rn5t618_adc_irq() local
88 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0); in rn5t618_adc_irq()
89 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0); in rn5t618_adc_irq()
91 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r); in rn5t618_adc_irq()
93 dev_err(adc->dev, "failed to read IRQ status: %d\n", ret); in rn5t618_adc_irq()
95 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC3, 0); in rn5t618_adc_irq()
98 complete(&adc->conv_completion); in rn5t618_adc_irq()
107 struct rn5t618_adc_data *adc = iio_priv(iio_dev); in rn5t618_adc_read() local
120 ret = regmap_update_bits(adc->rn5t618->regmap, RN5T618_ADCCNT3, in rn5t618_adc_read()
126 ret = regmap_write(adc->rn5t618->regmap, RN5T618_EN_ADCIR3, in rn5t618_adc_read()
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| D | mcp3422.c | 95 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig) in mcp3422_update_config() argument
99 ret = i2c_master_send(adc->i2c, &newconfig, 1); in mcp3422_update_config()
101 adc->config = newconfig; in mcp3422_update_config()
108 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_read() argument
111 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config); in mcp3422_read()
116 ret = i2c_master_recv(adc->i2c, buf, 4); in mcp3422_read()
120 ret = i2c_master_recv(adc->i2c, buf, 3); in mcp3422_read()
130 static int mcp3422_read_channel(struct mcp3422 *adc, in mcp3422_read_channel() argument
137 mutex_lock(&adc->lock); in mcp3422_read_channel()
139 if (req_channel != MCP3422_CHANNEL(adc->config)) { in mcp3422_read_channel()
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| D | ti-adc128s052.c | 35 static int adc128_adc_conversion(struct adc128 *adc, u8 channel) in adc128_adc_conversion() argument
39 mutex_lock(&adc->lock); in adc128_adc_conversion()
41 adc->buffer[0] = channel << 3; in adc128_adc_conversion()
42 adc->buffer[1] = 0; in adc128_adc_conversion()
44 ret = spi_write(adc->spi, &adc->buffer, 2); in adc128_adc_conversion()
46 mutex_unlock(&adc->lock); in adc128_adc_conversion()
50 ret = spi_read(adc->spi, &adc->buffer, 2); in adc128_adc_conversion()
52 mutex_unlock(&adc->lock); in adc128_adc_conversion()
57 return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF); in adc128_adc_conversion()
64 struct adc128 *adc = iio_priv(indio_dev); in adc128_read_raw() local
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| /linux-6.1.9/arch/arm/mach-s3c/ |
| D | adc.c | 83 static inline void s3c_adc_convert(struct adc_device *adc) in s3c_adc_convert() argument
85 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_convert()
88 writel(con, adc->regs + S3C2410_ADCCON); in s3c_adc_convert()
91 static inline void s3c_adc_select(struct adc_device *adc, in s3c_adc_select() argument
94 unsigned con = readl(adc->regs + S3C2410_ADCCON); in s3c_adc_select()
95 enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; in s3c_adc_select()
106 writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); in s3c_adc_select()
109 adc->regs + S3C2443_ADCMUX); in s3c_adc_select()
114 writel(con, adc->regs + S3C2410_ADCCON); in s3c_adc_select()
117 static void s3c_adc_dbgshow(struct adc_device *adc) in s3c_adc_dbgshow() argument
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| /linux-6.1.9/drivers/mfd/ |
| D | pcf50633-adc.c | 69 struct pcf50633_adc *adc = __to_adc(pcf); in trigger_next_adc_job_if_any() local
72 head = adc->queue_head; in trigger_next_adc_job_if_any()
74 if (!adc->queue[head]) in trigger_next_adc_job_if_any()
77 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); in trigger_next_adc_job_if_any()
83 struct pcf50633_adc *adc = __to_adc(pcf); in adc_enqueue_request() local
86 mutex_lock(&adc->queue_mutex); in adc_enqueue_request()
88 head = adc->queue_head; in adc_enqueue_request()
89 tail = adc->queue_tail; in adc_enqueue_request()
91 if (adc->queue[tail]) { in adc_enqueue_request()
92 mutex_unlock(&adc->queue_mutex); in adc_enqueue_request()
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| /linux-6.1.9/drivers/hwmon/ |
| D | adcxx.c | 52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
61 if (adc->channels == 1) { in adcxx_show()
77 value = value * adc->reference >> 12; in adcxx_show()
80 mutex_unlock(&adc->lock); in adcxx_show()
95 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
98 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
101 reference = adc->reference; in adcxx_max_show()
103 mutex_unlock(&adc->lock); in adcxx_max_show()
113 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_store() local
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| /linux-6.1.9/Documentation/devicetree/bindings/iio/adc/ |
| D | samsung,exynos-adc.yaml | 4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
15 - samsung,exynos-adc-v1 # Exynos5250
16 - samsung,exynos-adc-v2
17 - samsung,exynos3250-adc
18 - samsung,exynos4212-adc # Exynos4212 and Exynos4412
19 - samsung,exynos7-adc
20 - samsung,s3c2410-adc
21 - samsung,s3c2416-adc
22 - samsung,s3c2440-adc
23 - samsung,s3c2443-adc
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| D | atmel,sama9260-adc.yaml | 4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
19 - atmel,at91sama5d3-adc
36 atmel,adc-channels-used:
40 atmel,adc-startup-time:
45 atmel,adc-vref:
49 atmel,adc-use-external-triggers:
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