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/linux-6.1.9/include/linux/
Dhwmon-sysfs.h19 #define SENSOR_ATTR(_name, _mode, _show, _store, _index) \ argument
20 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
23 #define SENSOR_ATTR_RO(_name, _func, _index) \ argument
24 SENSOR_ATTR(_name, 0444, _func##_show, NULL, _index)
26 #define SENSOR_ATTR_RW(_name, _func, _index) \ argument
27 SENSOR_ATTR(_name, 0644, _func##_show, _func##_store, _index)
29 #define SENSOR_ATTR_WO(_name, _func, _index) \ argument
30 SENSOR_ATTR(_name, 0200, NULL, _func##_store, _index)
32 #define SENSOR_DEVICE_ATTR(_name, _mode, _show, _store, _index) \ argument
33 struct sensor_device_attribute sensor_dev_attr_##_name \
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Dsysfs.h101 #define __ATTR(_name, _mode, _show, _store) { \ argument
102 .attr = {.name = __stringify(_name), \
108 #define __ATTR_PREALLOC(_name, _mode, _show, _store) { \ argument
109 .attr = {.name = __stringify(_name), \
115 #define __ATTR_RO(_name) { \ argument
116 .attr = { .name = __stringify(_name), .mode = 0444 }, \
117 .show = _name##_show, \
120 #define __ATTR_RO_MODE(_name, _mode) { \ argument
121 .attr = { .name = __stringify(_name), \
123 .show = _name##_show, \
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Dconfigfs.h123 #define CONFIGFS_ATTR(_pfx, _name) \ argument
124 static struct configfs_attribute _pfx##attr_##_name = { \
125 .ca_name = __stringify(_name), \
128 .show = _pfx##_name##_show, \
129 .store = _pfx##_name##_store, \
132 #define CONFIGFS_ATTR_RO(_pfx, _name) \ argument
133 static struct configfs_attribute _pfx##attr_##_name = { \
134 .ca_name = __stringify(_name), \
137 .show = _pfx##_name##_show, \
140 #define CONFIGFS_ATTR_WO(_pfx, _name) \ argument
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Dcounter.h416 #define COUNTER_COMP_DEVICE_U8(_name, _read, _write) \ argument
419 .name = (_name), \
423 #define COUNTER_COMP_COUNT_U8(_name, _read, _write) \ argument
426 .name = (_name), \
430 #define COUNTER_COMP_SIGNAL_U8(_name, _read, _write) \ argument
433 .name = (_name), \
438 #define COUNTER_COMP_DEVICE_U64(_name, _read, _write) \ argument
441 .name = (_name), \
445 #define COUNTER_COMP_COUNT_U64(_name, _read, _write) \ argument
448 .name = (_name), \
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/linux-6.1.9/drivers/thermal/qcom/
Dtsens.h81 #define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \ argument
82 [_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
83 [_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
84 [_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
85 [_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
86 [_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
87 [_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
88 [_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
89 [_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
90 [_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
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/linux-6.1.9/drivers/staging/rtl8723bs/hal/
Dodm_interface.h16 #define _reg_all(_name) ODM_##_name argument
17 #define _reg_ic(_name, _ic) ODM_##_name##_ic argument
18 #define _bit_all(_name) BIT_##_name argument
19 #define _bit_ic(_name, _ic) BIT_##_name##_ic argument
29 #define _reg_11N(_name) ODM_REG_##_name##_11N argument
30 #define _bit_11N(_name) ODM_BIT_##_name##_11N argument
32 #define _cat(_name, _ic_type, _func) _func##_11N(_name) argument
37 #define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg) argument
38 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit) argument
/linux-6.1.9/include/linux/iio/
Dsysfs.h54 #define IIO_ATTR(_name, _mode, _show, _store, _addr) \ argument
55 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
58 #define IIO_ATTR_RO(_name, _addr) \ argument
59 { .dev_attr = __ATTR_RO(_name), \
62 #define IIO_ATTR_WO(_name, _addr) \ argument
63 { .dev_attr = __ATTR_WO(_name), \
66 #define IIO_ATTR_RW(_name, _addr) \ argument
67 { .dev_attr = __ATTR_RW(_name), \
70 #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ argument
71 struct iio_dev_attr iio_dev_attr_##_name \
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/linux-6.1.9/drivers/clk/sprd/
Dgate.h31 #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \ argument
42 .hw.init = _fn(_name, _parent, \
47 #define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \ argument
50 SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
54 #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \ argument
56 SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
60 #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \ argument
62 SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
66 #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \ argument
68 SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
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/linux-6.1.9/drivers/clk/renesas/
Drzg2l-cpg.h129 #define DEF_TYPE(_name, _id, _type...) \ argument
130 { .name = _name, .id = _id, .type = _type }
131 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
132 DEF_TYPE(_name, _id, _type, .parent = _parent)
133 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
134 DEF_TYPE(_name, _id, CLK_TYPE_SAM_PLL, .parent = _parent, .conf = _conf)
135 #define DEF_INPUT(_name, _id) \ argument
136 DEF_TYPE(_name, _id, CLK_TYPE_IN)
137 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
138 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
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Drcar-gen3-cpg.h36 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument
37 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset)
39 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
40 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
42 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument
43 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
47 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument
49 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \
52 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
53 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
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Drenesas-cpg-mssr.h44 #define DEF_TYPE(_name, _id, _type...) \ argument
45 { .name = _name, .id = _id, .type = _type }
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
47 DEF_TYPE(_name, _id, _type, .parent = _parent)
49 #define DEF_INPUT(_name, _id) \ argument
50 DEF_TYPE(_name, _id, CLK_TYPE_IN)
51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
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/linux-6.1.9/drivers/clk/starfive/
Dclk-starfive-jh7100.h30 #define JH7100_GATE(_idx, _name, _flags, _parent) [_idx] = { \ argument
31 .name = _name, \
37 #define JH7100__DIV(_idx, _name, _max, _parent) [_idx] = { \ argument
38 .name = _name, \
44 #define JH7100_GDIV(_idx, _name, _flags, _max, _parent) [_idx] = { \ argument
45 .name = _name, \
51 #define JH7100_FDIV(_idx, _name, _parent) [_idx] = { \ argument
52 .name = _name, \
58 #define JH7100__MUX(_idx, _name, _nparents, ...) [_idx] = { \ argument
59 .name = _name, \
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/linux-6.1.9/drivers/regulator/
Dmc13xxx.h55 #define MC13xxx_DEFINE(prefix, _name, _node, _reg, _vsel_reg, _voltages, _ops) \ argument
56 [prefix ## _name] = { \
63 .id = prefix ## _name, \
67 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
69 .vsel_shift = prefix ## _vsel_reg ## _ ## _name ## VSEL,\
70 .vsel_mask = prefix ## _vsel_reg ## _ ## _name ## VSEL_M,\
73 #define MC13xxx_FIXED_DEFINE(prefix, _name, _node, _reg, _voltages, _ops) \ argument
74 [prefix ## _name] = { \
81 .id = prefix ## _name, \
85 .enable_bit = prefix ## _reg ## _ ## _name ## EN, \
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/linux-6.1.9/include/rdma/
Dib_sysfs.h21 #define IB_PORT_ATTR_RW(_name) \ argument
22 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RW(_name)
24 #define IB_PORT_ATTR_ADMIN_RW(_name) \ argument
25 struct ib_port_attribute ib_port_attr_##_name = \
26 __ATTR_RW_MODE(_name, 0600)
28 #define IB_PORT_ATTR_RO(_name) \ argument
29 struct ib_port_attribute ib_port_attr_##_name = __ATTR_RO(_name)
31 #define IB_PORT_ATTR_WO(_name) \ argument
32 struct ib_port_attribute ib_port_attr_##_name = __ATTR_WO(_name)
/linux-6.1.9/drivers/platform/x86/dell/
Ddcdbas.h50 #define DCDBAS_DEV_ATTR_RW(_name) \ argument
51 DEVICE_ATTR(_name,0600,_name##_show,_name##_store);
53 #define DCDBAS_DEV_ATTR_RO(_name) \ argument
54 DEVICE_ATTR(_name,0400,_name##_show,NULL);
56 #define DCDBAS_DEV_ATTR_WO(_name) \ argument
57 DEVICE_ATTR(_name,0200,NULL,_name##_store);
59 #define DCDBAS_BIN_ATTR_RW(_name) \ argument
60 struct bin_attribute bin_attr_##_name = { \
61 .attr = { .name = __stringify(_name), \
63 .read = _name##_read, \
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/linux-6.1.9/drivers/clk/sunxi-ng/
Dccu_div.h87 #define SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \ argument
96 .hw.init = CLK_HW_INIT(_name, \
104 #define SUNXI_CCU_DIV_TABLE(_struct, _name, _parent, _reg, \ argument
107 SUNXI_CCU_DIV_TABLE_WITH_GATE(_struct, _name, _parent, _reg, \
111 #define SUNXI_CCU_DIV_TABLE_HW(_struct, _name, _parent, _reg, \ argument
119 .hw.init = CLK_HW_INIT_HW(_name, \
127 #define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \ argument
139 .hw.init = CLK_HW_INIT_PARENTS(_name, \
146 #define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ argument
149 SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
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Dccu_gate.h19 #define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \ argument
24 .hw.init = CLK_HW_INIT(_name, \
31 #define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \ argument
36 .hw.init = CLK_HW_INIT_HW(_name, \
43 #define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \ argument
48 .hw.init = CLK_HW_INIT_FW_NAME(_name, \
59 #define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \ argument
64 .hw.init = CLK_HW_INIT_HWS(_name, \
71 #define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \ argument
79 .hw.init = CLK_HW_INIT_HWS(_name, \
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/linux-6.1.9/drivers/platform/x86/intel/uncore-frequency/
Duncore-frequency-common.c123 #define init_attribute_rw(_name) \ argument
125 sysfs_attr_init(&data->_name##_dev_attr.attr); \
126 data->_name##_dev_attr.show = show_##_name; \
127 data->_name##_dev_attr.store = store_##_name; \
128 data->_name##_dev_attr.attr.name = #_name; \
129 data->_name##_dev_attr.attr.mode = 0644; \
132 #define init_attribute_ro(_name) \ argument
134 sysfs_attr_init(&data->_name##_dev_attr.attr); \
135 data->_name##_dev_attr.show = show_##_name; \
136 data->_name##_dev_attr.store = NULL; \
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/linux-6.1.9/drivers/gpu/drm/amd/pm/inc/
Damdgpu_pm.h63 #define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...) \ argument
64 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
68 #define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...) \ argument
69 __AMDGPU_DEVICE_ATTR(_name, _mode, \
70 amdgpu_get_##_name, amdgpu_set_##_name, \
73 #define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...) \ argument
74 AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, \
77 #define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...) \ argument
78 __AMDGPU_DEVICE_ATTR(_name, S_IRUGO, \
79 amdgpu_get_##_name, NULL, \
/linux-6.1.9/drivers/clk/mediatek/
Dclk-mtk.h32 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
34 .name = _name, \
52 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
54 .name = _name, \
88 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument
91 .name = _name, \
108 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument
110 MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \
117 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument
118 MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
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Dclk-mt8195-infra_ao.c44 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
45 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao0_cg_regs, _shift, \
48 #define GATE_INFRA_AO0(_id, _name, _parent, _shift) \ argument
49 GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, 0)
51 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
52 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao1_cg_regs, _shift, \
55 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ argument
56 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0)
58 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
59 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \
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/linux-6.1.9/include/linux/mfd/
Dcore.h17 #define MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, _use_of_reg, _match) \ argument
19 .name = (_name), \
31 #define MFD_CELL_OF_REG(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg) \ argument
32 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, true, NULL)
34 #define MFD_CELL_OF(_name, _res, _pdata, _pdsize, _id, _compat) \ argument
35 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, 0, false, NULL)
37 #define MFD_CELL_ACPI(_name, _res, _pdata, _pdsize, _id, _match) \ argument
38 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, _match)
40 #define MFD_CELL_BASIC(_name, _res, _pdata, _pdsize, _id) \ argument
41 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, NULL)
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/linux-6.1.9/arch/x86/include/asm/
Dpercpu.h405 #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ argument
406 DEFINE_PER_CPU(_type, _name) = _initvalue; \
407 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
409 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
411 #define DEFINE_EARLY_PER_CPU_READ_MOSTLY(_type, _name, _initvalue) \ argument
412 DEFINE_PER_CPU_READ_MOSTLY(_type, _name) = _initvalue; \
413 __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \
415 __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
417 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ argument
418 EXPORT_PER_CPU_SYMBOL(_name)
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/linux-6.1.9/drivers/gpu/drm/i915/gt/
Dintel_gt_sysfs_pm.c97 #define INTEL_GT_SYSFS_SHOW(_name, _attr_type) \ argument
98 static ssize_t _name##_show_common(struct kobject *kobj, \
102 __##_name##_show); \
106 static ssize_t _name##_show(struct kobject *kobj, \
109 return _name ##_show_common(kobj, &attr->attr, buff); \
111 static ssize_t _name##_dev_show(struct device *dev, \
114 return _name##_show_common(&dev->kobj, &attr->attr, buff); \
117 #define INTEL_GT_SYSFS_STORE(_name, _func) \ argument
118 static ssize_t _name##_store_common(struct kobject *kobj, \
133 static ssize_t _name##_store(struct kobject *kobj, \
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/linux-6.1.9/drivers/clk/pistachio/
Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
24 .name = _name, \
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
44 .name = _name, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
65 .name = _name, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
75 .name = _name, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
90 .name = _name, \
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