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Searched refs:__mlx5_bit_sz (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/include/linux/mlx5/
Dcq.h132 #define MLX5_MAX_CQ_PERIOD (BIT(__mlx5_bit_sz(cqc, cq_period)) - 1)
133 #define MLX5_MAX_CQ_COUNT (BIT(__mlx5_bit_sz(cqc, cq_max_count)) - 1)
Ddevice.h50 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld) macro
55 #define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf…
56 #define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1…
57 #define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1))
59 #define __mlx5_mask16(typ, fld) ((u16)((1ull << __mlx5_bit_sz(typ, fld)) - 1))
63 #define MLX5_FLD_SZ_BYTES(typ, fld) (__mlx5_bit_sz(typ, fld) / 8)
106 BUILD_BUG_ON(__mlx5_bit_sz(typ, fld) != 64); \
/linux-6.1.9/drivers/infiniband/hw/mlx5/
Dmlx5_ib.h67 __mlx5_bit_sz(typ, log_pgsz_fld), \
97 __mlx5_bit_sz(typ, log_pgsz_fld), pgsz_shift), \
98 __mlx5_bit_sz(typ, page_offset_fld), \
108 __mlx5_bit_sz(typ, log_pgsz_fld), pgsz_shift), \
109 __mlx5_bit_sz(typ, page_offset_fld), 0, scale, \
/linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dclock.c495 #define MLX5_MAX_PULSE_DURATION (BIT(__mlx5_bit_sz(mtpps_reg, out_pulse_duration_ns)) - 1)
/linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/
Dmain.c93 #define MAX_SW_VHCA_ID (BIT(__mlx5_bit_sz(cmd_hca_cap_2, sw_vhca_id)) - 1)