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Searched refs:__EVENT_CONSTRAINT (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/arch/x86/events/
Dperf_event.h354 #define __EVENT_CONSTRAINT(c, n, m, w, o, f) \ macro
358 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 0, 0)
368 __EVENT_CONSTRAINT(c, n, ARCH_PERFMON_EVENTSEL_EVENT, HWEIGHT(n),\
393 __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 1, 0)
452 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
456 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
460 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
464 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
468 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
484 __EVENT_CONSTRAINT(code, n, \
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Dcore.c2123 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1, in init_hw_perf_events()
/linux-6.1.9/arch/x86/events/amd/
Dcore.c1191 __EVENT_CONSTRAINT(0, 0x1, AMD64_RAW_EVENT_MASK, 1, 0, PERF_X86_EVENT_PAIR);
1393 __EVENT_CONSTRAINT(0, even_ctr_mask, 0, in amd_core_pmu_init()
/linux-6.1.9/arch/x86/events/intel/
Dlbr.c1623 __EVENT_CONSTRAINT(INTEL_FIXED_VLBR_EVENT, (1ULL << INTEL_PMC_IDX_FIXED_VLBR),
Duncore.c988 __EVENT_CONSTRAINT(0, (1ULL << type->num_counters) - 1, in uncore_type_init()
Dcore.c6462 __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1, in intel_pmu_init()
6483 __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1, in intel_pmu_init()