Searched refs:__APP_PLL_SCLK_CLK_DIV2 (Results 1 – 4 of 4) sorted by relevance
308 #define __APP_PLL_SCLK_CLK_DIV2 0x20000000 macro
666 r32 &= ~(__APP_PLL_SCLK_REFCLK_SEL | __APP_PLL_SCLK_CLK_DIV2); in bfa_ioc_ct2_sclk_init()683 __APP_PLL_SCLK_CLK_DIV2); in bfa_ioc_ct2_sclk_init()
307 #define __APP_PLL_SCLK_CLK_DIV2 0x20000000 macro
696 r32 &= ~(__APP_PLL_SCLK_REFCLK_SEL | __APP_PLL_SCLK_CLK_DIV2); in bfa_ioc_ct2_sclk_init()715 __APP_PLL_SCLK_CLK_DIV2); in bfa_ioc_ct2_sclk_init()