Searched refs:_MG_PLL_DIV0_PORT1 (Results 1 – 1 of 1) sorted by relevance
193 #define _MG_PLL_DIV0_PORT1 0x168A00 macro201 #define MG_PLL_DIV0(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV0_PORT1, \