Searched refs:XGMAC_DMA_CONTROL (Results 1 – 2 of 2) sorted by relevance
26 #define XGMAC_DMA_CONTROL 0x00000f18 /* Ctrl (Operational Mode) */ macro39 u32 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()42 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()
89 #define XGMAC_DMA_CONTROL 0x00000f18 /* Ctrl (Operational Mode) */ macro594 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_enable()596 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_enable()601 u32 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()603 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()916 reg = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()917 writel(reg & ~DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()927 writel(reg | DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()981 writel(DMA_CONTROL_OSF, ioaddr + XGMAC_DMA_CONTROL); in xgmac_hw_init()1875 value = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_suspend()[all …]