1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3 * x86_emulate.h
4 *
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
6 *
7 * Copyright (c) 2005 Keir Fraser
8 *
9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
10 */
11
12 #ifndef _ASM_X86_KVM_X86_EMULATE_H
13 #define _ASM_X86_KVM_X86_EMULATE_H
14
15 #include <asm/desc_defs.h>
16 #include "fpu.h"
17
18 struct x86_emulate_ctxt;
19 enum x86_intercept;
20 enum x86_intercept_stage;
21
22 struct x86_exception {
23 u8 vector;
24 bool error_code_valid;
25 u16 error_code;
26 bool nested_page_fault;
27 u64 address; /* cr2 or nested page fault gpa */
28 u8 async_page_fault;
29 };
30
31 /*
32 * This struct is used to carry enough information from the instruction
33 * decoder to main KVM so that a decision can be made whether the
34 * instruction needs to be intercepted or not.
35 */
36 struct x86_instruction_info {
37 u8 intercept; /* which intercept */
38 u8 rep_prefix; /* rep prefix? */
39 u8 modrm_mod; /* mod part of modrm */
40 u8 modrm_reg; /* index of register used */
41 u8 modrm_rm; /* rm part of modrm */
42 u64 src_val; /* value of source operand */
43 u64 dst_val; /* value of destination operand */
44 u8 src_bytes; /* size of source operand */
45 u8 dst_bytes; /* size of destination operand */
46 u8 ad_bytes; /* size of src/dst address */
47 u64 next_rip; /* rip following the instruction */
48 };
49
50 /*
51 * x86_emulate_ops:
52 *
53 * These operations represent the instruction emulator's interface to memory.
54 * There are two categories of operation: those that act on ordinary memory
55 * regions (*_std), and those that act on memory regions known to require
56 * special treatment or emulation (*_emulated).
57 *
58 * The emulator assumes that an instruction accesses only one 'emulated memory'
59 * location, that this location is the given linear faulting address (cr2), and
60 * that this is one of the instruction's data operands. Instruction fetches and
61 * stack operations are assumed never to access emulated memory. The emulator
62 * automatically deduces which operand of a string-move operation is accessing
63 * emulated memory, and assumes that the other operand accesses normal memory.
64 *
65 * NOTES:
66 * 1. The emulator isn't very smart about emulated vs. standard memory.
67 * 'Emulated memory' access addresses should be checked for sanity.
68 * 'Normal memory' accesses may fault, and the caller must arrange to
69 * detect and handle reentrancy into the emulator via recursive faults.
70 * Accesses may be unaligned and may cross page boundaries.
71 * 2. If the access fails (cannot emulate, or a standard access faults) then
72 * it is up to the memop to propagate the fault to the guest VM via
73 * some out-of-band mechanism, unknown to the emulator. The memop signals
74 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
75 * then immediately bail.
76 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
77 * cmpxchg8b_emulated need support 8-byte accesses.
78 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
79 */
80 /* Access completed successfully: continue emulation as normal. */
81 #define X86EMUL_CONTINUE 0
82 /* Access is unhandleable: bail from emulation and return error to caller. */
83 #define X86EMUL_UNHANDLEABLE 1
84 /* Terminate emulation but return success to the caller. */
85 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
86 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
87 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
88 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
89 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
90
91 struct x86_emulate_ops {
92 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
93 /*
94 * read_gpr: read a general purpose register (rax - r15)
95 *
96 * @reg: gpr number.
97 */
98 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
99 /*
100 * write_gpr: write a general purpose register (rax - r15)
101 *
102 * @reg: gpr number.
103 * @val: value to write.
104 */
105 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
106 /*
107 * read_std: Read bytes of standard (non-emulated/special) memory.
108 * Used for descriptor reading.
109 * @addr: [IN ] Linear address from which to read.
110 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
111 * @bytes: [IN ] Number of bytes to read from memory.
112 * @system:[IN ] Whether the access is forced to be at CPL0.
113 */
114 int (*read_std)(struct x86_emulate_ctxt *ctxt,
115 unsigned long addr, void *val,
116 unsigned int bytes,
117 struct x86_exception *fault, bool system);
118
119 /*
120 * read_phys: Read bytes of standard (non-emulated/special) memory.
121 * Used for descriptor reading.
122 * @addr: [IN ] Physical address from which to read.
123 * @val: [OUT] Value read from memory.
124 * @bytes: [IN ] Number of bytes to read from memory.
125 */
126 int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
127 void *val, unsigned int bytes);
128
129 /*
130 * write_std: Write bytes of standard (non-emulated/special) memory.
131 * Used for descriptor writing.
132 * @addr: [IN ] Linear address to which to write.
133 * @val: [OUT] Value write to memory, zero-extended to 'u_long'.
134 * @bytes: [IN ] Number of bytes to write to memory.
135 * @system:[IN ] Whether the access is forced to be at CPL0.
136 */
137 int (*write_std)(struct x86_emulate_ctxt *ctxt,
138 unsigned long addr, void *val, unsigned int bytes,
139 struct x86_exception *fault, bool system);
140 /*
141 * fetch: Read bytes of standard (non-emulated/special) memory.
142 * Used for instruction fetch.
143 * @addr: [IN ] Linear address from which to read.
144 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
145 * @bytes: [IN ] Number of bytes to read from memory.
146 */
147 int (*fetch)(struct x86_emulate_ctxt *ctxt,
148 unsigned long addr, void *val, unsigned int bytes,
149 struct x86_exception *fault);
150
151 /*
152 * read_emulated: Read bytes from emulated/special memory area.
153 * @addr: [IN ] Linear address from which to read.
154 * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
155 * @bytes: [IN ] Number of bytes to read from memory.
156 */
157 int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
158 unsigned long addr, void *val, unsigned int bytes,
159 struct x86_exception *fault);
160
161 /*
162 * write_emulated: Write bytes to emulated/special memory area.
163 * @addr: [IN ] Linear address to which to write.
164 * @val: [IN ] Value to write to memory (low-order bytes used as
165 * required).
166 * @bytes: [IN ] Number of bytes to write to memory.
167 */
168 int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
169 unsigned long addr, const void *val,
170 unsigned int bytes,
171 struct x86_exception *fault);
172
173 /*
174 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
175 * emulated/special memory area.
176 * @addr: [IN ] Linear address to access.
177 * @old: [IN ] Value expected to be current at @addr.
178 * @new: [IN ] Value to write to @addr.
179 * @bytes: [IN ] Number of bytes to access using CMPXCHG.
180 */
181 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
182 unsigned long addr,
183 const void *old,
184 const void *new,
185 unsigned int bytes,
186 struct x86_exception *fault);
187 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
188
189 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
190 int size, unsigned short port, void *val,
191 unsigned int count);
192
193 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
194 int size, unsigned short port, const void *val,
195 unsigned int count);
196
197 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
198 struct desc_struct *desc, u32 *base3, int seg);
199 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
200 struct desc_struct *desc, u32 base3, int seg);
201 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
202 int seg);
203 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
204 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
205 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
206 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
207 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
208 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
209 int (*cpl)(struct x86_emulate_ctxt *ctxt);
210 void (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
211 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
212 u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
213 void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
214 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
215 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
216 int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
217 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
218 int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
219 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
220 void (*halt)(struct x86_emulate_ctxt *ctxt);
221 void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
222 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
223 int (*intercept)(struct x86_emulate_ctxt *ctxt,
224 struct x86_instruction_info *info,
225 enum x86_intercept_stage stage);
226
227 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
228 u32 *ecx, u32 *edx, bool exact_only);
229 bool (*guest_has_long_mode)(struct x86_emulate_ctxt *ctxt);
230 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
231 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
232 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
233
234 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
235
236 unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
237 void (*exiting_smm)(struct x86_emulate_ctxt *ctxt);
238 int (*leave_smm)(struct x86_emulate_ctxt *ctxt, const char *smstate);
239 void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
240 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
241 };
242
243 /* Type, address-of, and value of an instruction's operand. */
244 struct operand {
245 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
246 unsigned int bytes;
247 unsigned int count;
248 union {
249 unsigned long orig_val;
250 u64 orig_val64;
251 };
252 union {
253 unsigned long *reg;
254 struct segmented_address {
255 ulong ea;
256 unsigned seg;
257 } mem;
258 unsigned xmm;
259 unsigned mm;
260 } addr;
261 union {
262 unsigned long val;
263 u64 val64;
264 char valptr[sizeof(sse128_t)];
265 sse128_t vec_val;
266 u64 mm_val;
267 void *data;
268 };
269 };
270
271 struct fetch_cache {
272 u8 data[15];
273 u8 *ptr;
274 u8 *end;
275 };
276
277 struct read_cache {
278 u8 data[1024];
279 unsigned long pos;
280 unsigned long end;
281 };
282
283 /* Execution mode, passed to the emulator. */
284 enum x86emul_mode {
285 X86EMUL_MODE_REAL, /* Real mode. */
286 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
287 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
288 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
289 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
290 };
291
292 /* These match some of the HF_* flags defined in kvm_host.h */
293 #define X86EMUL_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
294 #define X86EMUL_SMM_MASK (1 << 6)
295 #define X86EMUL_SMM_INSIDE_NMI_MASK (1 << 7)
296
297 /*
298 * fastop functions are declared as taking a never-defined fastop parameter,
299 * so they can't be called from C directly.
300 */
301 struct fastop;
302
303 typedef void (*fastop_t)(struct fastop *);
304
305 /*
306 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is
307 * tracked/accessed via _eip, and except for RIP relative addressing, which
308 * also uses _eip, RIP cannot be a register operand nor can it be an operand in
309 * a ModRM or SIB byte.
310 */
311 #ifdef CONFIG_X86_64
312 #define NR_EMULATOR_GPRS 16
313 #else
314 #define NR_EMULATOR_GPRS 8
315 #endif
316
317 struct x86_emulate_ctxt {
318 void *vcpu;
319 const struct x86_emulate_ops *ops;
320
321 /* Register state before/after emulation. */
322 unsigned long eflags;
323 unsigned long eip; /* eip before instruction emulation */
324 /* Emulated execution mode, represented by an X86EMUL_MODE value. */
325 enum x86emul_mode mode;
326
327 /* interruptibility state, as a result of execution of STI or MOV SS */
328 int interruptibility;
329
330 bool perm_ok; /* do not check permissions if true */
331 bool tf; /* TF value before instruction (after for syscall/sysret) */
332
333 bool have_exception;
334 struct x86_exception exception;
335
336 /* GPA available */
337 bool gpa_available;
338 gpa_t gpa_val;
339
340 /*
341 * decode cache
342 */
343
344 /* current opcode length in bytes */
345 u8 opcode_len;
346 u8 b;
347 u8 intercept;
348 u8 op_bytes;
349 u8 ad_bytes;
350 union {
351 int (*execute)(struct x86_emulate_ctxt *ctxt);
352 fastop_t fop;
353 };
354 int (*check_perm)(struct x86_emulate_ctxt *ctxt);
355
356 bool rip_relative;
357 u8 rex_prefix;
358 u8 lock_prefix;
359 u8 rep_prefix;
360 /* bitmaps of registers in _regs[] that can be read */
361 u16 regs_valid;
362 /* bitmaps of registers in _regs[] that have been written */
363 u16 regs_dirty;
364 /* modrm */
365 u8 modrm;
366 u8 modrm_mod;
367 u8 modrm_reg;
368 u8 modrm_rm;
369 u8 modrm_seg;
370 u8 seg_override;
371 u64 d;
372 unsigned long _eip;
373
374 /* Here begins the usercopy section. */
375 struct operand src;
376 struct operand src2;
377 struct operand dst;
378 struct operand memop;
379 unsigned long _regs[NR_EMULATOR_GPRS];
380 struct operand *memopp;
381 struct fetch_cache fetch;
382 struct read_cache io_read;
383 struct read_cache mem_read;
384 bool is_branch;
385 };
386
387 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \
388 ({ \
389 int __ret = (cond); \
390 \
391 if (WARN_ON_ONCE(__ret)) \
392 ctxt->ops->vm_bugged(ctxt); \
393 unlikely(__ret); \
394 })
395
396 /* Repeat String Operation Prefix */
397 #define REPE_PREFIX 0xf3
398 #define REPNE_PREFIX 0xf2
399
400 /* CPUID vendors */
401 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
402 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
403 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
404
405 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
406 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
407 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
408
409 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
410 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
411 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
412
413 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
414 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
415 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
416
417 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
418 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
419 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
420
is_guest_vendor_intel(u32 ebx,u32 ecx,u32 edx)421 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
422 {
423 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
424 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
425 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
426 }
427
is_guest_vendor_amd(u32 ebx,u32 ecx,u32 edx)428 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
429 {
430 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
431 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
432 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
433 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
434 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
435 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
436 }
437
is_guest_vendor_hygon(u32 ebx,u32 ecx,u32 edx)438 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
439 {
440 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
441 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
442 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
443 }
444
445 enum x86_intercept_stage {
446 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
447 X86_ICPT_PRE_EXCEPT,
448 X86_ICPT_POST_EXCEPT,
449 X86_ICPT_POST_MEMACCESS,
450 };
451
452 enum x86_intercept {
453 x86_intercept_none,
454 x86_intercept_cr_read,
455 x86_intercept_cr_write,
456 x86_intercept_clts,
457 x86_intercept_lmsw,
458 x86_intercept_smsw,
459 x86_intercept_dr_read,
460 x86_intercept_dr_write,
461 x86_intercept_lidt,
462 x86_intercept_sidt,
463 x86_intercept_lgdt,
464 x86_intercept_sgdt,
465 x86_intercept_lldt,
466 x86_intercept_sldt,
467 x86_intercept_ltr,
468 x86_intercept_str,
469 x86_intercept_rdtsc,
470 x86_intercept_rdpmc,
471 x86_intercept_pushf,
472 x86_intercept_popf,
473 x86_intercept_cpuid,
474 x86_intercept_rsm,
475 x86_intercept_iret,
476 x86_intercept_intn,
477 x86_intercept_invd,
478 x86_intercept_pause,
479 x86_intercept_hlt,
480 x86_intercept_invlpg,
481 x86_intercept_invlpga,
482 x86_intercept_vmrun,
483 x86_intercept_vmload,
484 x86_intercept_vmsave,
485 x86_intercept_vmmcall,
486 x86_intercept_stgi,
487 x86_intercept_clgi,
488 x86_intercept_skinit,
489 x86_intercept_rdtscp,
490 x86_intercept_rdpid,
491 x86_intercept_icebp,
492 x86_intercept_wbinvd,
493 x86_intercept_monitor,
494 x86_intercept_mwait,
495 x86_intercept_rdmsr,
496 x86_intercept_wrmsr,
497 x86_intercept_in,
498 x86_intercept_ins,
499 x86_intercept_out,
500 x86_intercept_outs,
501 x86_intercept_xsetbv,
502
503 nr_x86_intercepts
504 };
505
506 /* Host execution mode. */
507 #if defined(CONFIG_X86_32)
508 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
509 #elif defined(CONFIG_X86_64)
510 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
511 #endif
512
513 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
514 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
515 #define EMULATION_FAILED -1
516 #define EMULATION_OK 0
517 #define EMULATION_RESTART 1
518 #define EMULATION_INTERCEPTED 2
519 void init_decode_cache(struct x86_emulate_ctxt *ctxt);
520 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
521 int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
522 u16 tss_selector, int idt_index, int reason,
523 bool has_error_code, u32 error_code);
524 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
525 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
526 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
527 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
528
529 #endif /* _ASM_X86_KVM_X86_EMULATE_H */
530