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Searched refs:VoltageLevel (Results 1 – 14 of 14) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_mode_vba_32.c79 dml_print("DML::%s: mode_lib->vba.VoltageLevel = %d\n", __func__, mode_lib->vba.VoltageLevel); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
367 mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
536 mode_lib->vba.VoltageLevel, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
600 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = mode_lib->vba.WritebackLatency in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
611 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
615 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
616 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
635 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
636 v->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
697 dml_ceil((double) v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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Ddisplay_mode_vba_util_32.h688 const int VoltageLevel,
695 const int VoltageLevel,
Ddcn32_fpu.c535 unsigned int vlevel = context->bw_ctx.dml.vba.VoltageLevel; in dcn32_set_phantom_stream_timing()
576 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()
679 …vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plan… in dcn32_assign_subvp_pipe()
1096 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1197 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1216 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper()
1541 vba->VoltageLevel = vlevel; in dcn32_internal_validate_bw()
Ddisplay_mode_vba_util_32.c3277 const int VoltageLevel, in dml32_get_return_bw_mbps() argument
3289 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps()
3293 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps()
3302 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps()
3320 const int VoltageLevel, in dml32_get_return_bw_mbps_vm_only() argument
3330 * (VoltageLevel < 2 ? in dml32_get_return_bw_mbps_vm_only()
3334 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps_vm_only()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c1890 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1932 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1982 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1995 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1999 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2001 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2021 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2022 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2031 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2058 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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Ddisplay_mode_vba_20v2.c1926 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1968 &mode_lib->vba.PTEBufferSizeNotExceeded[mode_lib->vba.VoltageLevel][0], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2018 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2031 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2035 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2037 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2057 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2058 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2067 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2094 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.c79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level()
376 if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) in fetch_socbb_params()
1077 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage; in ModeSupportAndSystemConfiguration()
1078 …mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][mode_lib->vba.… in ModeSupportAndSystemConfiguration()
1080 mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][0]; in ModeSupportAndSystemConfiguration()
1081 ….FabricAndDRAMBandwidth = mode_lib->vba.FabricAndDRAMBandwidthPerState[mode_lib->vba.VoltageLevel]; in ModeSupportAndSystemConfiguration()
1092 mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; in ModeSupportAndSystemConfiguration()
1101 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
Ddisplay_mode_vba.h422 int VoltageLevel; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c2044 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2057 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2061 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2063 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2083 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2084 locals->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2088 …ctive[k] - dml_max(1.0, dml_ceil(locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] / (mode_lib… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2104 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2419 mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2565 if (mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb] == 0) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c1858 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1870 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1872 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1873 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1875 …v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdeal… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1877 …v->ReturnBW = v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] * v->PercentOfIdeal… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2133 double BPP = v->OutputBppPerState[k][v->VoltageLevel]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2362 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency + in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2372 v->WritebackDelay[v->VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2376 v->WritebackDelay[v->VoltageLevel][k] = dml_max(v->WritebackDelay[v->VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_mode_vba_31.c2004 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2013 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2014 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);
2015 …double IdealDRAMBandwidthPerState = v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * …
2512 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency
2523 v->WritebackDelay[v->VoltageLevel][k] = 0;
2526 v->WritebackDelay[v->VoltageLevel][k] = dml_max(
2527 v->WritebackDelay[v->VoltageLevel][k],
2546 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
2556 (double) v->WritebackDelay[v->VoltageLevel][k]
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Ddcn31_fpu.c469 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_mode_vba_314.c2025 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2034 v->ReturnBusWidth * v->DCFCLKState[v->VoltageLevel][v->maxMpcComb],
2035 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn);
2036 …double IdealDRAMBandwidthPerState = v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * …
2534 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency
2545 v->WritebackDelay[v->VoltageLevel][k] = 0;
2548 v->WritebackDelay[v->VoltageLevel][k] = dml_max(
2549 v->WritebackDelay[v->VoltageLevel][k],
2568 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j];
2581 v->WritebackDelay[v->VoltageLevel][k]);
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c1659 context->bw_ctx.dml.vba.VoltageLevel = 0; in dcn30_internal_validate_bw()
1879 context->bw_ctx.dml.vba.VoltageLevel = vlevel; in dcn30_internal_validate_bw()