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Searched refs:VM_L2_PROTECTION_FAULT_CNTL (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c379 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
381 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
383 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
385 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
388 VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
391 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
393 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
395 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
397 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
399 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in gfxhub_v1_0_set_fault_enable_default()
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Dmmhub_v1_0.c382 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
384 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
386 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
388 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
391 VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
394 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
396 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
398 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
400 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
402 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_0_set_fault_enable_default()
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Dmmhub_v1_7.c392 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
394 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
396 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
398 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
401 VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
404 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
406 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
408 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
410 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
412 tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL, in mmhub_v1_7_set_fault_enable_default()
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Damdgpu_gmc.h273 u64 VM_L2_PROTECTION_FAULT_CNTL; member
Dgfxhub_v2_1.c587 adev->gmc.VM_L2_PROTECTION_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_save_regs()
621 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_restore_regs()