Searched refs:VGIC_NR_PRIVATE_IRQS (Results 1 – 12 of 12) sorted by relevance
27 #define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS) macro28 #define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1)34 #define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)35 #define irq_is_spi(irq) ((irq) >= VGIC_NR_PRIVATE_IRQS && \331 struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS];393 #define vgic_valid_spi(k, i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \394 ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
44 if (iter->intid == VGIC_NR_PRIVATE_IRQS && in iter_next()48 if (iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS)) { in iter_next()79 iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS) && in end_of_vgic()185 else if (irq->intid < VGIC_NR_PRIVATE_IRQS) in print_irq_state()192 if (irq->intid ==0 || irq->intid == VGIC_NR_PRIVATE_IRQS) in print_irq_state()
153 irq->intid = i + VGIC_NR_PRIVATE_IRQS; in kvm_vgic_dist_init()203 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { in kvm_vgic_vcpu_init()271 dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS; in vgic_init()281 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { in vgic_init()
488 intid >= VGIC_NR_PRIVATE_IRQS) in vgic_access_active_prepare()496 intid >= VGIC_NR_PRIVATE_IRQS) in vgic_access_active_finish()762 if (intid + i < VGIC_NR_PRIVATE_IRQS) in vgic_mmio_write_config()782 int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_read_irq_line_level_info()804 int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_write_irq_line_level_info()934 int flags, nr_irqs = kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS; in check_region()
225 if (val < (VGIC_NR_PRIVATE_IRQS + 32) || in vgic_set_common_attr()236 val - VGIC_NR_PRIVATE_IRQS; in vgic_set_common_attr()288 VGIC_NR_PRIVATE_IRQS, uaddr); in vgic_get_common_attr()
100 if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { in vgic_get_irq()101 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS); in vgic_get_irq()102 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; in vgic_get_irq()452 if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS) in kvm_vgic_inject_irq()
22 unsigned int spi_id = e->irqchip.pin + VGIC_NR_PRIVATE_IRQS; in vgic_irqfd_set_irq()
79 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v3_misc()597 .len = (bpi * VGIC_NR_PRIVATE_IRQS) / 8, \602 .reg_offset = off + (bpi * VGIC_NR_PRIVATE_IRQS) / 8, \604 .len = (bpi * (1024 - VGIC_NR_PRIVATE_IRQS)) / 8, \
36 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v2_misc()190 if (intid < VGIC_NR_PRIVATE_IRQS) in vgic_mmio_write_target()
73 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v2_fold_lr_state()
65 intid - VGIC_NR_PRIVATE_IRQS); in vgic_v3_fold_lr_state()
1107 if (irq_num < VGIC_NR_SGIS || irq_num >= VGIC_NR_PRIVATE_IRQS) in kvm_vm_ioctl_irq_line()1115 if (irq_num < VGIC_NR_PRIVATE_IRQS) in kvm_vm_ioctl_irq_line()