1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/vfp/vfpmodule.c
4  *
5  *  Copyright (C) 2004 ARM Limited.
6  *  Written by Deep Blue Solutions Limited.
7  */
8 #include <linux/types.h>
9 #include <linux/cpu.h>
10 #include <linux/cpu_pm.h>
11 #include <linux/hardirq.h>
12 #include <linux/kernel.h>
13 #include <linux/notifier.h>
14 #include <linux/signal.h>
15 #include <linux/sched/signal.h>
16 #include <linux/smp.h>
17 #include <linux/init.h>
18 #include <linux/uaccess.h>
19 #include <linux/user.h>
20 #include <linux/export.h>
21 
22 #include <asm/cp15.h>
23 #include <asm/cputype.h>
24 #include <asm/system_info.h>
25 #include <asm/thread_notify.h>
26 #include <asm/traps.h>
27 #include <asm/vfp.h>
28 
29 #include "vfpinstr.h"
30 #include "vfp.h"
31 
32 /*
33  * Our undef handlers (in entry.S)
34  */
35 asmlinkage void vfp_support_entry(void);
36 asmlinkage void vfp_null_entry(void);
37 
38 asmlinkage void (*vfp_vector)(void) = vfp_null_entry;
39 
40 /*
41  * Dual-use variable.
42  * Used in startup: set to non-zero if VFP checks fail
43  * After startup, holds VFP architecture
44  */
45 static unsigned int __initdata VFP_arch;
46 
47 /*
48  * The pointer to the vfpstate structure of the thread which currently
49  * owns the context held in the VFP hardware, or NULL if the hardware
50  * context is invalid.
51  *
52  * For UP, this is sufficient to tell which thread owns the VFP context.
53  * However, for SMP, we also need to check the CPU number stored in the
54  * saved state too to catch migrations.
55  */
56 union vfp_state *vfp_current_hw_state[NR_CPUS];
57 
58 /*
59  * Is 'thread's most up to date state stored in this CPUs hardware?
60  * Must be called from non-preemptible context.
61  */
vfp_state_in_hw(unsigned int cpu,struct thread_info * thread)62 static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread)
63 {
64 #ifdef CONFIG_SMP
65 	if (thread->vfpstate.hard.cpu != cpu)
66 		return false;
67 #endif
68 	return vfp_current_hw_state[cpu] == &thread->vfpstate;
69 }
70 
71 /*
72  * Force a reload of the VFP context from the thread structure.  We do
73  * this by ensuring that access to the VFP hardware is disabled, and
74  * clear vfp_current_hw_state.  Must be called from non-preemptible context.
75  */
vfp_force_reload(unsigned int cpu,struct thread_info * thread)76 static void vfp_force_reload(unsigned int cpu, struct thread_info *thread)
77 {
78 	if (vfp_state_in_hw(cpu, thread)) {
79 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
80 		vfp_current_hw_state[cpu] = NULL;
81 	}
82 #ifdef CONFIG_SMP
83 	thread->vfpstate.hard.cpu = NR_CPUS;
84 #endif
85 }
86 
87 /*
88  * Per-thread VFP initialization.
89  */
vfp_thread_flush(struct thread_info * thread)90 static void vfp_thread_flush(struct thread_info *thread)
91 {
92 	union vfp_state *vfp = &thread->vfpstate;
93 	unsigned int cpu;
94 
95 	/*
96 	 * Disable VFP to ensure we initialize it first.  We must ensure
97 	 * that the modification of vfp_current_hw_state[] and hardware
98 	 * disable are done for the same CPU and without preemption.
99 	 *
100 	 * Do this first to ensure that preemption won't overwrite our
101 	 * state saving should access to the VFP be enabled at this point.
102 	 */
103 	cpu = get_cpu();
104 	if (vfp_current_hw_state[cpu] == vfp)
105 		vfp_current_hw_state[cpu] = NULL;
106 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
107 	put_cpu();
108 
109 	memset(vfp, 0, sizeof(union vfp_state));
110 
111 	vfp->hard.fpexc = FPEXC_EN;
112 	vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
113 #ifdef CONFIG_SMP
114 	vfp->hard.cpu = NR_CPUS;
115 #endif
116 }
117 
vfp_thread_exit(struct thread_info * thread)118 static void vfp_thread_exit(struct thread_info *thread)
119 {
120 	/* release case: Per-thread VFP cleanup. */
121 	union vfp_state *vfp = &thread->vfpstate;
122 	unsigned int cpu = get_cpu();
123 
124 	if (vfp_current_hw_state[cpu] == vfp)
125 		vfp_current_hw_state[cpu] = NULL;
126 	put_cpu();
127 }
128 
vfp_thread_copy(struct thread_info * thread)129 static void vfp_thread_copy(struct thread_info *thread)
130 {
131 	struct thread_info *parent = current_thread_info();
132 
133 	vfp_sync_hwstate(parent);
134 	thread->vfpstate = parent->vfpstate;
135 #ifdef CONFIG_SMP
136 	thread->vfpstate.hard.cpu = NR_CPUS;
137 #endif
138 }
139 
140 /*
141  * When this function is called with the following 'cmd's, the following
142  * is true while this function is being run:
143  *  THREAD_NOFTIFY_SWTICH:
144  *   - the previously running thread will not be scheduled onto another CPU.
145  *   - the next thread to be run (v) will not be running on another CPU.
146  *   - thread->cpu is the local CPU number
147  *   - not preemptible as we're called in the middle of a thread switch
148  *  THREAD_NOTIFY_FLUSH:
149  *   - the thread (v) will be running on the local CPU, so
150  *	v === current_thread_info()
151  *   - thread->cpu is the local CPU number at the time it is accessed,
152  *	but may change at any time.
153  *   - we could be preempted if tree preempt rcu is enabled, so
154  *	it is unsafe to use thread->cpu.
155  *  THREAD_NOTIFY_EXIT
156  *   - we could be preempted if tree preempt rcu is enabled, so
157  *	it is unsafe to use thread->cpu.
158  */
vfp_notifier(struct notifier_block * self,unsigned long cmd,void * v)159 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
160 {
161 	struct thread_info *thread = v;
162 	u32 fpexc;
163 #ifdef CONFIG_SMP
164 	unsigned int cpu;
165 #endif
166 
167 	switch (cmd) {
168 	case THREAD_NOTIFY_SWITCH:
169 		fpexc = fmrx(FPEXC);
170 
171 #ifdef CONFIG_SMP
172 		cpu = thread->cpu;
173 
174 		/*
175 		 * On SMP, if VFP is enabled, save the old state in
176 		 * case the thread migrates to a different CPU. The
177 		 * restoring is done lazily.
178 		 */
179 		if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
180 			vfp_save_state(vfp_current_hw_state[cpu], fpexc);
181 #endif
182 
183 		/*
184 		 * Always disable VFP so we can lazily save/restore the
185 		 * old state.
186 		 */
187 		fmxr(FPEXC, fpexc & ~FPEXC_EN);
188 		break;
189 
190 	case THREAD_NOTIFY_FLUSH:
191 		vfp_thread_flush(thread);
192 		break;
193 
194 	case THREAD_NOTIFY_EXIT:
195 		vfp_thread_exit(thread);
196 		break;
197 
198 	case THREAD_NOTIFY_COPY:
199 		vfp_thread_copy(thread);
200 		break;
201 	}
202 
203 	return NOTIFY_DONE;
204 }
205 
206 static struct notifier_block vfp_notifier_block = {
207 	.notifier_call	= vfp_notifier,
208 };
209 
210 /*
211  * Raise a SIGFPE for the current process.
212  * sicode describes the signal being raised.
213  */
vfp_raise_sigfpe(unsigned int sicode,struct pt_regs * regs)214 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
215 {
216 	/*
217 	 * This is the same as NWFPE, because it's not clear what
218 	 * this is used for
219 	 */
220 	current->thread.error_code = 0;
221 	current->thread.trap_no = 6;
222 
223 	send_sig_fault(SIGFPE, sicode,
224 		       (void __user *)(instruction_pointer(regs) - 4),
225 		       current);
226 }
227 
vfp_panic(char * reason,u32 inst)228 static void vfp_panic(char *reason, u32 inst)
229 {
230 	int i;
231 
232 	pr_err("VFP: Error: %s\n", reason);
233 	pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
234 		fmrx(FPEXC), fmrx(FPSCR), inst);
235 	for (i = 0; i < 32; i += 2)
236 		pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
237 		       i, vfp_get_float(i), i+1, vfp_get_float(i+1));
238 }
239 
240 /*
241  * Process bitmask of exception conditions.
242  */
vfp_raise_exceptions(u32 exceptions,u32 inst,u32 fpscr,struct pt_regs * regs)243 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
244 {
245 	int si_code = 0;
246 
247 	pr_debug("VFP: raising exceptions %08x\n", exceptions);
248 
249 	if (exceptions == VFP_EXCEPTION_ERROR) {
250 		vfp_panic("unhandled bounce", inst);
251 		vfp_raise_sigfpe(FPE_FLTINV, regs);
252 		return;
253 	}
254 
255 	/*
256 	 * If any of the status flags are set, update the FPSCR.
257 	 * Comparison instructions always return at least one of
258 	 * these flags set.
259 	 */
260 	if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
261 		fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
262 
263 	fpscr |= exceptions;
264 
265 	fmxr(FPSCR, fpscr);
266 
267 #define RAISE(stat,en,sig)				\
268 	if (exceptions & stat && fpscr & en)		\
269 		si_code = sig;
270 
271 	/*
272 	 * These are arranged in priority order, least to highest.
273 	 */
274 	RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
275 	RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
276 	RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
277 	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
278 	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
279 
280 	if (si_code)
281 		vfp_raise_sigfpe(si_code, regs);
282 }
283 
284 /*
285  * Emulate a VFP instruction.
286  */
vfp_emulate_instruction(u32 inst,u32 fpscr,struct pt_regs * regs)287 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
288 {
289 	u32 exceptions = VFP_EXCEPTION_ERROR;
290 
291 	pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
292 
293 	if (INST_CPRTDO(inst)) {
294 		if (!INST_CPRT(inst)) {
295 			/*
296 			 * CPDO
297 			 */
298 			if (vfp_single(inst)) {
299 				exceptions = vfp_single_cpdo(inst, fpscr);
300 			} else {
301 				exceptions = vfp_double_cpdo(inst, fpscr);
302 			}
303 		} else {
304 			/*
305 			 * A CPRT instruction can not appear in FPINST2, nor
306 			 * can it cause an exception.  Therefore, we do not
307 			 * have to emulate it.
308 			 */
309 		}
310 	} else {
311 		/*
312 		 * A CPDT instruction can not appear in FPINST2, nor can
313 		 * it cause an exception.  Therefore, we do not have to
314 		 * emulate it.
315 		 */
316 	}
317 	return exceptions & ~VFP_NAN_FLAG;
318 }
319 
320 /*
321  * Package up a bounce condition.
322  */
VFP_bounce(u32 trigger,u32 fpexc,struct pt_regs * regs)323 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
324 {
325 	u32 fpscr, orig_fpscr, fpsid, exceptions;
326 
327 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
328 
329 	/*
330 	 * At this point, FPEXC can have the following configuration:
331 	 *
332 	 *  EX DEX IXE
333 	 *  0   1   x   - synchronous exception
334 	 *  1   x   0   - asynchronous exception
335 	 *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
336 	 *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
337 	 *                implementation), undefined otherwise
338 	 *
339 	 * Clear various bits and enable access to the VFP so we can
340 	 * handle the bounce.
341 	 */
342 	fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
343 
344 	fpsid = fmrx(FPSID);
345 	orig_fpscr = fpscr = fmrx(FPSCR);
346 
347 	/*
348 	 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
349 	 */
350 	if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
351 	    && (fpscr & FPSCR_IXE)) {
352 		/*
353 		 * Synchronous exception, emulate the trigger instruction
354 		 */
355 		goto emulate;
356 	}
357 
358 	if (fpexc & FPEXC_EX) {
359 #ifndef CONFIG_CPU_FEROCEON
360 		/*
361 		 * Asynchronous exception. The instruction is read from FPINST
362 		 * and the interrupted instruction has to be restarted.
363 		 */
364 		trigger = fmrx(FPINST);
365 		regs->ARM_pc -= 4;
366 #endif
367 	} else if (!(fpexc & FPEXC_DEX)) {
368 		/*
369 		 * Illegal combination of bits. It can be caused by an
370 		 * unallocated VFP instruction but with FPSCR.IXE set and not
371 		 * on VFP subarch 1.
372 		 */
373 		 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
374 		goto exit;
375 	}
376 
377 	/*
378 	 * Modify fpscr to indicate the number of iterations remaining.
379 	 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
380 	 * whether FPEXC.VECITR or FPSCR.LEN is used.
381 	 */
382 	if (fpexc & (FPEXC_EX | FPEXC_VV)) {
383 		u32 len;
384 
385 		len = fpexc + (1 << FPEXC_LENGTH_BIT);
386 
387 		fpscr &= ~FPSCR_LENGTH_MASK;
388 		fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
389 	}
390 
391 	/*
392 	 * Handle the first FP instruction.  We used to take note of the
393 	 * FPEXC bounce reason, but this appears to be unreliable.
394 	 * Emulate the bounced instruction instead.
395 	 */
396 	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
397 	if (exceptions)
398 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
399 
400 	/*
401 	 * If there isn't a second FP instruction, exit now. Note that
402 	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
403 	 */
404 	if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
405 		goto exit;
406 
407 	/*
408 	 * The barrier() here prevents fpinst2 being read
409 	 * before the condition above.
410 	 */
411 	barrier();
412 	trigger = fmrx(FPINST2);
413 
414  emulate:
415 	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
416 	if (exceptions)
417 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
418  exit:
419 	preempt_enable();
420 }
421 
vfp_enable(void * unused)422 static void vfp_enable(void *unused)
423 {
424 	u32 access;
425 
426 	BUG_ON(preemptible());
427 	access = get_copro_access();
428 
429 	/*
430 	 * Enable full access to VFP (cp10 and cp11)
431 	 */
432 	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
433 }
434 
435 /* Called by platforms on which we want to disable VFP because it may not be
436  * present on all CPUs within a SMP complex. Needs to be called prior to
437  * vfp_init().
438  */
vfp_disable(void)439 void __init vfp_disable(void)
440 {
441 	if (VFP_arch) {
442 		pr_debug("%s: should be called prior to vfp_init\n", __func__);
443 		return;
444 	}
445 	VFP_arch = 1;
446 }
447 
448 #ifdef CONFIG_CPU_PM
vfp_pm_suspend(void)449 static int vfp_pm_suspend(void)
450 {
451 	struct thread_info *ti = current_thread_info();
452 	u32 fpexc = fmrx(FPEXC);
453 
454 	/* if vfp is on, then save state for resumption */
455 	if (fpexc & FPEXC_EN) {
456 		pr_debug("%s: saving vfp state\n", __func__);
457 		vfp_save_state(&ti->vfpstate, fpexc);
458 
459 		/* disable, just in case */
460 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
461 	} else if (vfp_current_hw_state[ti->cpu]) {
462 #ifndef CONFIG_SMP
463 		fmxr(FPEXC, fpexc | FPEXC_EN);
464 		vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
465 		fmxr(FPEXC, fpexc);
466 #endif
467 	}
468 
469 	/* clear any information we had about last context state */
470 	vfp_current_hw_state[ti->cpu] = NULL;
471 
472 	return 0;
473 }
474 
vfp_pm_resume(void)475 static void vfp_pm_resume(void)
476 {
477 	/* ensure we have access to the vfp */
478 	vfp_enable(NULL);
479 
480 	/* and disable it to ensure the next usage restores the state */
481 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
482 }
483 
vfp_cpu_pm_notifier(struct notifier_block * self,unsigned long cmd,void * v)484 static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd,
485 	void *v)
486 {
487 	switch (cmd) {
488 	case CPU_PM_ENTER:
489 		vfp_pm_suspend();
490 		break;
491 	case CPU_PM_ENTER_FAILED:
492 	case CPU_PM_EXIT:
493 		vfp_pm_resume();
494 		break;
495 	}
496 	return NOTIFY_OK;
497 }
498 
499 static struct notifier_block vfp_cpu_pm_notifier_block = {
500 	.notifier_call = vfp_cpu_pm_notifier,
501 };
502 
vfp_pm_init(void)503 static void vfp_pm_init(void)
504 {
505 	cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block);
506 }
507 
508 #else
vfp_pm_init(void)509 static inline void vfp_pm_init(void) { }
510 #endif /* CONFIG_CPU_PM */
511 
512 /*
513  * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
514  * with the hardware state.
515  */
vfp_sync_hwstate(struct thread_info * thread)516 void vfp_sync_hwstate(struct thread_info *thread)
517 {
518 	unsigned int cpu = get_cpu();
519 
520 	if (vfp_state_in_hw(cpu, thread)) {
521 		u32 fpexc = fmrx(FPEXC);
522 
523 		/*
524 		 * Save the last VFP state on this CPU.
525 		 */
526 		fmxr(FPEXC, fpexc | FPEXC_EN);
527 		vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
528 		fmxr(FPEXC, fpexc);
529 	}
530 
531 	put_cpu();
532 }
533 
534 /* Ensure that the thread reloads the hardware VFP state on the next use. */
vfp_flush_hwstate(struct thread_info * thread)535 void vfp_flush_hwstate(struct thread_info *thread)
536 {
537 	unsigned int cpu = get_cpu();
538 
539 	vfp_force_reload(cpu, thread);
540 
541 	put_cpu();
542 }
543 
544 /*
545  * Save the current VFP state into the provided structures and prepare
546  * for entry into a new function (signal handler).
547  */
vfp_preserve_user_clear_hwstate(struct user_vfp * ufp,struct user_vfp_exc * ufp_exc)548 int vfp_preserve_user_clear_hwstate(struct user_vfp *ufp,
549 				    struct user_vfp_exc *ufp_exc)
550 {
551 	struct thread_info *thread = current_thread_info();
552 	struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
553 
554 	/* Ensure that the saved hwstate is up-to-date. */
555 	vfp_sync_hwstate(thread);
556 
557 	/*
558 	 * Copy the floating point registers. There can be unused
559 	 * registers see asm/hwcap.h for details.
560 	 */
561 	memcpy(&ufp->fpregs, &hwstate->fpregs, sizeof(hwstate->fpregs));
562 
563 	/*
564 	 * Copy the status and control register.
565 	 */
566 	ufp->fpscr = hwstate->fpscr;
567 
568 	/*
569 	 * Copy the exception registers.
570 	 */
571 	ufp_exc->fpexc = hwstate->fpexc;
572 	ufp_exc->fpinst = hwstate->fpinst;
573 	ufp_exc->fpinst2 = hwstate->fpinst2;
574 
575 	/* Ensure that VFP is disabled. */
576 	vfp_flush_hwstate(thread);
577 
578 	/*
579 	 * As per the PCS, clear the length and stride bits for function
580 	 * entry.
581 	 */
582 	hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
583 	return 0;
584 }
585 
586 /* Sanitise and restore the current VFP state from the provided structures. */
vfp_restore_user_hwstate(struct user_vfp * ufp,struct user_vfp_exc * ufp_exc)587 int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc)
588 {
589 	struct thread_info *thread = current_thread_info();
590 	struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
591 	unsigned long fpexc;
592 
593 	/* Disable VFP to avoid corrupting the new thread state. */
594 	vfp_flush_hwstate(thread);
595 
596 	/*
597 	 * Copy the floating point registers. There can be unused
598 	 * registers see asm/hwcap.h for details.
599 	 */
600 	memcpy(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs));
601 	/*
602 	 * Copy the status and control register.
603 	 */
604 	hwstate->fpscr = ufp->fpscr;
605 
606 	/*
607 	 * Sanitise and restore the exception registers.
608 	 */
609 	fpexc = ufp_exc->fpexc;
610 
611 	/* Ensure the VFP is enabled. */
612 	fpexc |= FPEXC_EN;
613 
614 	/* Ensure FPINST2 is invalid and the exception flag is cleared. */
615 	fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
616 	hwstate->fpexc = fpexc;
617 
618 	hwstate->fpinst = ufp_exc->fpinst;
619 	hwstate->fpinst2 = ufp_exc->fpinst2;
620 
621 	return 0;
622 }
623 
624 /*
625  * VFP hardware can lose all context when a CPU goes offline.
626  * As we will be running in SMP mode with CPU hotplug, we will save the
627  * hardware state at every thread switch.  We clear our held state when
628  * a CPU has been killed, indicating that the VFP hardware doesn't contain
629  * a threads VFP state.  When a CPU starts up, we re-enable access to the
630  * VFP hardware. The callbacks below are called on the CPU which
631  * is being offlined/onlined.
632  */
vfp_dying_cpu(unsigned int cpu)633 static int vfp_dying_cpu(unsigned int cpu)
634 {
635 	vfp_current_hw_state[cpu] = NULL;
636 	return 0;
637 }
638 
vfp_starting_cpu(unsigned int unused)639 static int vfp_starting_cpu(unsigned int unused)
640 {
641 	vfp_enable(NULL);
642 	return 0;
643 }
644 
645 #ifdef CONFIG_KERNEL_MODE_NEON
646 
vfp_kmode_exception(struct pt_regs * regs,unsigned int instr)647 static int vfp_kmode_exception(struct pt_regs *regs, unsigned int instr)
648 {
649 	/*
650 	 * If we reach this point, a floating point exception has been raised
651 	 * while running in kernel mode. If the NEON/VFP unit was enabled at the
652 	 * time, it means a VFP instruction has been issued that requires
653 	 * software assistance to complete, something which is not currently
654 	 * supported in kernel mode.
655 	 * If the NEON/VFP unit was disabled, and the location pointed to below
656 	 * is properly preceded by a call to kernel_neon_begin(), something has
657 	 * caused the task to be scheduled out and back in again. In this case,
658 	 * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should
659 	 * be helpful in localizing the problem.
660 	 */
661 	if (fmrx(FPEXC) & FPEXC_EN)
662 		pr_crit("BUG: unsupported FP instruction in kernel mode\n");
663 	else
664 		pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n");
665 	pr_crit("FPEXC == 0x%08x\n", fmrx(FPEXC));
666 	return 1;
667 }
668 
669 static struct undef_hook vfp_kmode_exception_hook[] = {{
670 	.instr_mask	= 0xfe000000,
671 	.instr_val	= 0xf2000000,
672 	.cpsr_mask	= MODE_MASK | PSR_T_BIT,
673 	.cpsr_val	= SVC_MODE,
674 	.fn		= vfp_kmode_exception,
675 }, {
676 	.instr_mask	= 0xff100000,
677 	.instr_val	= 0xf4000000,
678 	.cpsr_mask	= MODE_MASK | PSR_T_BIT,
679 	.cpsr_val	= SVC_MODE,
680 	.fn		= vfp_kmode_exception,
681 }, {
682 	.instr_mask	= 0xef000000,
683 	.instr_val	= 0xef000000,
684 	.cpsr_mask	= MODE_MASK | PSR_T_BIT,
685 	.cpsr_val	= SVC_MODE | PSR_T_BIT,
686 	.fn		= vfp_kmode_exception,
687 }, {
688 	.instr_mask	= 0xff100000,
689 	.instr_val	= 0xf9000000,
690 	.cpsr_mask	= MODE_MASK | PSR_T_BIT,
691 	.cpsr_val	= SVC_MODE | PSR_T_BIT,
692 	.fn		= vfp_kmode_exception,
693 }, {
694 	.instr_mask	= 0x0c000e00,
695 	.instr_val	= 0x0c000a00,
696 	.cpsr_mask	= MODE_MASK,
697 	.cpsr_val	= SVC_MODE,
698 	.fn		= vfp_kmode_exception,
699 }};
700 
vfp_kmode_exception_hook_init(void)701 static int __init vfp_kmode_exception_hook_init(void)
702 {
703 	int i;
704 
705 	for (i = 0; i < ARRAY_SIZE(vfp_kmode_exception_hook); i++)
706 		register_undef_hook(&vfp_kmode_exception_hook[i]);
707 	return 0;
708 }
709 subsys_initcall(vfp_kmode_exception_hook_init);
710 
711 /*
712  * Kernel-side NEON support functions
713  */
kernel_neon_begin(void)714 void kernel_neon_begin(void)
715 {
716 	struct thread_info *thread = current_thread_info();
717 	unsigned int cpu;
718 	u32 fpexc;
719 
720 	/*
721 	 * Kernel mode NEON is only allowed outside of interrupt context
722 	 * with preemption disabled. This will make sure that the kernel
723 	 * mode NEON register contents never need to be preserved.
724 	 */
725 	BUG_ON(in_interrupt());
726 	cpu = get_cpu();
727 
728 	fpexc = fmrx(FPEXC) | FPEXC_EN;
729 	fmxr(FPEXC, fpexc);
730 
731 	/*
732 	 * Save the userland NEON/VFP state. Under UP,
733 	 * the owner could be a task other than 'current'
734 	 */
735 	if (vfp_state_in_hw(cpu, thread))
736 		vfp_save_state(&thread->vfpstate, fpexc);
737 #ifndef CONFIG_SMP
738 	else if (vfp_current_hw_state[cpu] != NULL)
739 		vfp_save_state(vfp_current_hw_state[cpu], fpexc);
740 #endif
741 	vfp_current_hw_state[cpu] = NULL;
742 }
743 EXPORT_SYMBOL(kernel_neon_begin);
744 
kernel_neon_end(void)745 void kernel_neon_end(void)
746 {
747 	/* Disable the NEON/VFP unit. */
748 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
749 	put_cpu();
750 }
751 EXPORT_SYMBOL(kernel_neon_end);
752 
753 #endif /* CONFIG_KERNEL_MODE_NEON */
754 
vfp_detect(struct pt_regs * regs,unsigned int instr)755 static int __init vfp_detect(struct pt_regs *regs, unsigned int instr)
756 {
757 	VFP_arch = UINT_MAX;	/* mark as not present */
758 	regs->ARM_pc += 4;
759 	return 0;
760 }
761 
762 static struct undef_hook vfp_detect_hook __initdata = {
763 	.instr_mask	= 0x0c000e00,
764 	.instr_val	= 0x0c000a00,
765 	.cpsr_mask	= MODE_MASK,
766 	.cpsr_val	= SVC_MODE,
767 	.fn		= vfp_detect,
768 };
769 
770 /*
771  * VFP support code initialisation.
772  */
vfp_init(void)773 static int __init vfp_init(void)
774 {
775 	unsigned int vfpsid;
776 	unsigned int cpu_arch = cpu_architecture();
777 
778 	/*
779 	 * Enable the access to the VFP on all online CPUs so the
780 	 * following test on FPSID will succeed.
781 	 */
782 	if (cpu_arch >= CPU_ARCH_ARMv6)
783 		on_each_cpu(vfp_enable, NULL, 1);
784 
785 	/*
786 	 * First check that there is a VFP that we can use.
787 	 * The handler is already setup to just log calls, so
788 	 * we just need to read the VFPSID register.
789 	 */
790 	register_undef_hook(&vfp_detect_hook);
791 	barrier();
792 	vfpsid = fmrx(FPSID);
793 	barrier();
794 	unregister_undef_hook(&vfp_detect_hook);
795 	vfp_vector = vfp_null_entry;
796 
797 	pr_info("VFP support v0.3: ");
798 	if (VFP_arch) {
799 		pr_cont("not present\n");
800 		return 0;
801 	/* Extract the architecture on CPUID scheme */
802 	} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
803 		VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK;
804 		VFP_arch >>= FPSID_ARCH_BIT;
805 		/*
806 		 * Check for the presence of the Advanced SIMD
807 		 * load/store instructions, integer and single
808 		 * precision floating point operations. Only check
809 		 * for NEON if the hardware has the MVFR registers.
810 		 */
811 		if (IS_ENABLED(CONFIG_NEON) &&
812 		   (fmrx(MVFR1) & 0x000fff00) == 0x00011100)
813 			elf_hwcap |= HWCAP_NEON;
814 
815 		if (IS_ENABLED(CONFIG_VFPv3)) {
816 			u32 mvfr0 = fmrx(MVFR0);
817 			if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 ||
818 			    ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) {
819 				elf_hwcap |= HWCAP_VFPv3;
820 				/*
821 				 * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
822 				 * this configuration only have 16 x 64bit
823 				 * registers.
824 				 */
825 				if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1)
826 					/* also v4-D16 */
827 					elf_hwcap |= HWCAP_VFPv3D16;
828 				else
829 					elf_hwcap |= HWCAP_VFPD32;
830 			}
831 
832 			if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
833 				elf_hwcap |= HWCAP_VFPv4;
834 		}
835 	/* Extract the architecture version on pre-cpuid scheme */
836 	} else {
837 		if (vfpsid & FPSID_NODOUBLE) {
838 			pr_cont("no double precision support\n");
839 			return 0;
840 		}
841 
842 		VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;
843 	}
844 
845 	cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING,
846 				  "arm/vfp:starting", vfp_starting_cpu,
847 				  vfp_dying_cpu);
848 
849 	vfp_vector = vfp_support_entry;
850 
851 	thread_register_notifier(&vfp_notifier_block);
852 	vfp_pm_init();
853 
854 	/*
855 	 * We detected VFP, and the support code is
856 	 * in place; report VFP support to userspace.
857 	 */
858 	elf_hwcap |= HWCAP_VFP;
859 
860 	pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",
861 		(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
862 		VFP_arch,
863 		(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
864 		(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
865 		(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
866 
867 	return 0;
868 }
869 
870 core_initcall(vfp_init);
871