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Searched refs:V7M_SCB_CTR (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/arch/arm/mm/
Dproc-macros.S75 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR
76 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR
93 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR
94 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR
/linux-6.1.9/arch/arm/include/asm/
Dv7m.h58 #define V7M_SCB_CTR 0x7c /* Cache Type register */ macro
Dcachetype.h90 writel(cache_selector, BASEADDR_V7M_SCB + V7M_SCB_CTR); in set_csselr()
Dcputype.h204 return readl(BASEADDR_V7M_SCB + V7M_SCB_CTR); in read_cpuid_cachetype()
/linux-6.1.9/arch/arm/boot/compressed/
Dhead.S692 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR
693 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR