Searched refs:UVD_VCPU_CNTL__CLK_EN_MASK (Results 1 – 19 of 19) sorted by relevance
887 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK | UVD_VCPU_CNTL__BLK_RST_MASK; in vcn_v4_0_start_dpg_mode()934 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v4_0_start_dpg_mode()1021 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v4_0_start()1456 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v4_0_stop()
796 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()857 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_5_start_dpg_mode()954 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_5_start()1383 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_5_stop()
962 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()1023 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v3_0_start_dpg_mode()1124 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v3_0_start()1570 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v3_0_stop()
814 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v2_0_start_dpg_mode()954 UVD_VCPU_CNTL__CLK_EN_MASK, ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v2_0_start()1170 ~(UVD_VCPU_CNTL__CLK_EN_MASK)); in vcn_v2_0_stop()
851 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_start_spg_mode()982 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK; in vcn_v1_0_start_dpg_mode()1140 ~UVD_VCPU_CNTL__CLK_EN_MASK); in vcn_v1_0_stop_spg_mode()
900 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_sriov_start()1031 UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v7_0_start()
789 WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v6_0_start()
665 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro
543 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
768 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x00000200L macro
547 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
579 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
581 #define UVD_VCPU_CNTL__CLK_EN_MASK 0x200 macro
1187 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro
2759 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro
112 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro
3818 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro
4066 #define UVD_VCPU_CNTL__CLK_EN_MASK … macro