Home
last modified time | relevance | path

Searched refs:UVD_SUVD_CGC_CTRL__SMP_MODE_MASK (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h257 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Duvd_5_0_sh_mask.h789 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x4 macro
Duvd_6_0_sh_mask.h783 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK 0x4 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c714 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
Dvcn_v4_0.c726 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v4_0_disable_clock_gating()
842 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v4_0_enable_clock_gating()
Dvcn_v1_0.c556 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v1_0_disable_clock_gating()
628 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v1_0_enable_clock_gating()
Dvcn_v2_0.c581 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v2_0_disable_clock_gating()
690 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v2_0_enable_clock_gating()
Dvcn_v2_5.c651 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v2_5_disable_clock_gating()
761 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v2_5_enable_clock_gating()
Dvcn_v3_0.c803 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v3_0_disable_clock_gating()
919 | UVD_SUVD_CGC_CTRL__SMP_MODE_MASK in vcn_v3_0_enable_clock_gating()
Duvd_v6_0.c1372 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
Duvd_v7_0.c1654 UVD_SUVD_CGC_CTRL__SMP_MODE_MASK |
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h549 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Dvcn_2_5_sh_mask.h2182 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Dvcn_2_0_0_sh_mask.h3308 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Dvcn_2_6_0_sh_mask.h3853 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Dvcn_3_0_0_sh_mask.h2939 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro
Dvcn_4_0_0_sh_mask.h2867 #define UVD_SUVD_CGC_CTRL__SMP_MODE_MASK macro