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Searched refs:UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h748 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Duvd_3_1_sh_mask.h622 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x0 macro
Duvd_4_0_sh_mask.h607 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x00000000 macro
Duvd_4_2_sh_mask.h628 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x0 macro
Duvd_5_0_sh_mask.h690 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x0 macro
Duvd_6_0_sh_mask.h692 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x0 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1275 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Dvcn_2_5_sh_mask.h2922 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Dvcn_2_0_0_sh_mask.h2893 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Dvcn_2_6_0_sh_mask.h3247 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Dvcn_3_0_0_sh_mask.h4003 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
Dvcn_4_0_0_sh_mask.h4253 #define UVD_RBC_RB_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro