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Searched refs:UVD_CGC_GATE__UDEC_DB_MASK (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c656 UVD_CGC_GATE__UDEC_DB_MASK | in uvd_v5_0_enable_clock_gating()
743 UVD_CGC_GATE__UDEC_DB_MASK |
Duvd_v6_0.c656 UVD_CGC_GATE__UDEC_DB_MASK |
689 UVD_CGC_GATE__UDEC_DB_MASK |
1313 UVD_CGC_GATE__UDEC_DB_MASK | in uvd_v6_0_enable_clock_gating()
1401 UVD_CGC_GATE__UDEC_DB_MASK |
Dvcn_v4_0.c664 | UVD_CGC_GATE__UDEC_DB_MASK in vcn_v4_0_disable_clock_gating()
Duvd_v7_0.c1685 UVD_CGC_GATE__UDEC_DB_MASK |
Dvcn_v1_0.c495 | UVD_CGC_GATE__UDEC_DB_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_0.c520 | UVD_CGC_GATE__UDEC_DB_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v2_5.c587 | UVD_CGC_GATE__UDEC_DB_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c725 | UVD_CGC_GATE__UDEC_DB_MASK in vcn_v3_0_disable_clock_gating()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h412 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Duvd_3_1_sh_mask.h153 #define UVD_CGC_GATE__UDEC_DB_MASK 0x8000 macro
Duvd_4_0_sh_mask.h104 #define UVD_CGC_GATE__UDEC_DB_MASK 0x00008000L macro
Duvd_4_2_sh_mask.h153 #define UVD_CGC_GATE__UDEC_DB_MASK 0x8000 macro
Duvd_5_0_sh_mask.h165 #define UVD_CGC_GATE__UDEC_DB_MASK 0x8000 macro
Duvd_6_0_sh_mask.h167 #define UVD_CGC_GATE__UDEC_DB_MASK 0x8000 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h840 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Dvcn_2_5_sh_mask.h1910 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Dvcn_2_0_0_sh_mask.h1859 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Dvcn_2_6_0_sh_mask.h3581 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Dvcn_3_0_0_sh_mask.h2640 #define UVD_CGC_GATE__UDEC_DB_MASK macro
Dvcn_4_0_0_sh_mask.h75 #define UVD_CGC_GATE__UDEC_DB_MASK macro