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Searched refs:UVD_CGC_GATE__LRBBM_MASK (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c652 UVD_CGC_GATE__LRBBM_MASK | in uvd_v5_0_enable_clock_gating()
739 UVD_CGC_GATE__LRBBM_MASK |
Duvd_v6_0.c652 UVD_CGC_GATE__LRBBM_MASK |
685 UVD_CGC_GATE__LRBBM_MASK |
1309 UVD_CGC_GATE__LRBBM_MASK | in uvd_v6_0_enable_clock_gating()
1397 UVD_CGC_GATE__LRBBM_MASK |
Dvcn_v4_0.c660 | UVD_CGC_GATE__LRBBM_MASK in vcn_v4_0_disable_clock_gating()
Duvd_v7_0.c1681 UVD_CGC_GATE__LRBBM_MASK |
Dvcn_v1_0.c491 | UVD_CGC_GATE__LRBBM_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_0.c516 | UVD_CGC_GATE__LRBBM_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v2_5.c583 | UVD_CGC_GATE__LRBBM_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c721 | UVD_CGC_GATE__LRBBM_MASK in vcn_v3_0_disable_clock_gating()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h408 #define UVD_CGC_GATE__LRBBM_MASK … macro
Duvd_3_1_sh_mask.h145 #define UVD_CGC_GATE__LRBBM_MASK 0x800 macro
Duvd_4_0_sh_mask.h86 #define UVD_CGC_GATE__LRBBM_MASK 0x00000800L macro
Duvd_4_2_sh_mask.h145 #define UVD_CGC_GATE__LRBBM_MASK 0x800 macro
Duvd_5_0_sh_mask.h157 #define UVD_CGC_GATE__LRBBM_MASK 0x800 macro
Duvd_6_0_sh_mask.h159 #define UVD_CGC_GATE__LRBBM_MASK 0x800 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h836 #define UVD_CGC_GATE__LRBBM_MASK … macro
Dvcn_2_5_sh_mask.h1906 #define UVD_CGC_GATE__LRBBM_MASK … macro
Dvcn_2_0_0_sh_mask.h1855 #define UVD_CGC_GATE__LRBBM_MASK … macro
Dvcn_2_6_0_sh_mask.h3577 #define UVD_CGC_GATE__LRBBM_MASK … macro
Dvcn_3_0_0_sh_mask.h2636 #define UVD_CGC_GATE__LRBBM_MASK … macro
Dvcn_4_0_0_sh_mask.h71 #define UVD_CGC_GATE__LRBBM_MASK … macro