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Searched refs:UVD_CGC_CTRL__UDEC_CM_MODE_MASK (Results 1 – 20 of 20) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/ !
Duvd_7_0_sh_mask.h445 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Duvd_3_1_sh_mask.h229 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000 macro
Duvd_4_0_sh_mask.h62 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x00001000L macro
Duvd_4_2_sh_mask.h229 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000 macro
Duvd_5_0_sh_mask.h251 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000 macro
Duvd_6_0_sh_mask.h253 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK 0x1000 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ !
Dvcn_v4_0.c675 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v4_0_disable_clock_gating()
760 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
818 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v4_0_enable_clock_gating()
Dvcn_v1_0.c504 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v1_0_disable_clock_gating()
604 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v1_0_enable_clock_gating()
662 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
Dvcn_v2_0.c529 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v2_0_disable_clock_gating()
605 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
666 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v2_0_enable_clock_gating()
Duvd_v5_0.c692 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
Dvcn_v2_5.c599 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v2_5_disable_clock_gating()
676 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
738 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v2_5_enable_clock_gating()
Dvcn_v3_0.c737 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v3_0_disable_clock_gating()
836 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
895 | UVD_CGC_CTRL__UDEC_CM_MODE_MASK in vcn_v3_0_enable_clock_gating()
Duvd_v6_0.c1349 UVD_CGC_CTRL__UDEC_CM_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
Duvd_v7_0.c1631 UVD_CGC_CTRL__UDEC_CM_MODE_MASK |
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/ !
Dvcn_1_0_sh_mask.h938 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Dvcn_2_5_sh_mask.h2006 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Dvcn_2_0_0_sh_mask.h1957 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Dvcn_2_6_0_sh_mask.h3677 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Dvcn_3_0_0_sh_mask.h2736 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro
Dvcn_4_0_0_sh_mask.h114 #define UVD_CGC_CTRL__UDEC_CM_MODE_MASK macro