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Searched refs:UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT (Results 1 – 19 of 19) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h420 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Duvd_3_1_sh_mask.h226 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x6 macro
Duvd_4_0_sh_mask.h35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006 macro
Duvd_4_2_sh_mask.h226 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x6 macro
Duvd_5_0_sh_mask.h248 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x6 macro
Duvd_6_0_sh_mask.h250 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x6 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c645 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v4_0_disable_clock_gating()
758 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v4_0_disable_clock_gating_dpg_mode()
813 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v4_0_enable_clock_gating()
Dvcn_v1_0.c476 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v1_0_disable_clock_gating()
599 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v1_0_enable_clock_gating()
660 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v1_0_clock_gating_dpg_mode()
Dvcn_v2_0.c501 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_0_disable_clock_gating()
603 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_0_clock_gating_dpg_mode()
661 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_0_enable_clock_gating()
Duvd_v3_1.c217 (4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT); in uvd_v3_1_set_dcm()
Duvd_v4_2.c641 (4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT); in uvd_v4_2_set_dcm()
Dvcn_v2_5.c568 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_5_disable_clock_gating()
674 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_5_clock_gating_dpg_mode()
733 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v2_5_enable_clock_gating()
Dvcn_v3_0.c706 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v3_0_disable_clock_gating()
834 reg_data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v3_0_clock_gating_dpg_mode()
890 data |= 4 << UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT; in vcn_v3_0_enable_clock_gating()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h913 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Dvcn_2_5_sh_mask.h1981 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1931 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Dvcn_2_6_0_sh_mask.h3652 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2711 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro
Dvcn_4_0_0_sh_mask.h89 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT … macro