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Searched refs:UMC_BASE__INST3_SEG0 (Results 1 – 13 of 13) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h792 #define UMC_BASE__INST3_SEG0 0 macro
Ddimgrey_cavefish_ip_offset.h972 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dnavi12_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dnavi14_ip_offset.h1011 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dvega20_ip_offset.h861 #define UMC_BASE__INST3_SEG0 0 macro
Dsienna_cichlid_ip_offset.h1060 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dbeige_goby_ip_offset.h1197 #define UMC_BASE__INST3_SEG0 0 macro
Drenoir_ip_offset.h1261 #define UMC_BASE__INST3_SEG0 0 macro
Dvega10_ip_offset.h1103 #define UMC_BASE__INST3_SEG0 0 macro
Dvangogh_ip_offset.h1369 #define UMC_BASE__INST3_SEG0 0x000D4000 macro
Dyellow_carp_offset.h1289 #define UMC_BASE__INST3_SEG0 0 macro
Darct_ip_offset.h1446 #define UMC_BASE__INST3_SEG0 0x00013320 macro
Daldebaran_ip_offset.h1416 #define UMC_BASE__INST3_SEG0 0x00194000 macro