1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 *
4 * TWL4030 MADC module driver-This driver monitors the real time
5 * conversion of analog signals like battery temperature,
6 * battery type, battery level etc.
7 *
8 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
9 * J Keerthy <j-keerthy@ti.com>
10 *
11 * Based on twl4030-madc.c
12 * Copyright (C) 2008 Nokia Corporation
13 * Mikko Ylinen <mikko.k.ylinen@nokia.com>
14 *
15 * Amit Kucheria <amit.kucheria@canonical.com>
16 */
17
18 #include <linux/device.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/mfd/twl.h>
25 #include <linux/module.h>
26 #include <linux/stddef.h>
27 #include <linux/mutex.h>
28 #include <linux/bitops.h>
29 #include <linux/jiffies.h>
30 #include <linux/types.h>
31 #include <linux/gfp.h>
32 #include <linux/err.h>
33 #include <linux/regulator/consumer.h>
34
35 #include <linux/iio/iio.h>
36
37 #define TWL4030_MADC_MAX_CHANNELS 16
38
39 #define TWL4030_MADC_CTRL1 0x00
40 #define TWL4030_MADC_CTRL2 0x01
41
42 #define TWL4030_MADC_RTSELECT_LSB 0x02
43 #define TWL4030_MADC_SW1SELECT_LSB 0x06
44 #define TWL4030_MADC_SW2SELECT_LSB 0x0A
45
46 #define TWL4030_MADC_RTAVERAGE_LSB 0x04
47 #define TWL4030_MADC_SW1AVERAGE_LSB 0x08
48 #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
49
50 #define TWL4030_MADC_CTRL_SW1 0x12
51 #define TWL4030_MADC_CTRL_SW2 0x13
52
53 #define TWL4030_MADC_RTCH0_LSB 0x17
54 #define TWL4030_MADC_GPCH0_LSB 0x37
55
56 #define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */
57 #define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */
58 /* MADC conversion completion */
59 #define TWL4030_MADC_EOC_SW (1 << 1)
60 /* MADC SWx start conversion */
61 #define TWL4030_MADC_SW_START (1 << 5)
62 #define TWL4030_MADC_ADCIN0 (1 << 0)
63 #define TWL4030_MADC_ADCIN1 (1 << 1)
64 #define TWL4030_MADC_ADCIN2 (1 << 2)
65 #define TWL4030_MADC_ADCIN3 (1 << 3)
66 #define TWL4030_MADC_ADCIN4 (1 << 4)
67 #define TWL4030_MADC_ADCIN5 (1 << 5)
68 #define TWL4030_MADC_ADCIN6 (1 << 6)
69 #define TWL4030_MADC_ADCIN7 (1 << 7)
70 #define TWL4030_MADC_ADCIN8 (1 << 8)
71 #define TWL4030_MADC_ADCIN9 (1 << 9)
72 #define TWL4030_MADC_ADCIN10 (1 << 10)
73 #define TWL4030_MADC_ADCIN11 (1 << 11)
74 #define TWL4030_MADC_ADCIN12 (1 << 12)
75 #define TWL4030_MADC_ADCIN13 (1 << 13)
76 #define TWL4030_MADC_ADCIN14 (1 << 14)
77 #define TWL4030_MADC_ADCIN15 (1 << 15)
78
79 /* Fixed channels */
80 #define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
81 #define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
82 #define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
83 #define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
84 #define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
85 #define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
86
87 /* Step size and prescaler ratio */
88 #define TEMP_STEP_SIZE 147
89 #define TEMP_PSR_R 100
90 #define CURR_STEP_SIZE 147
91 #define CURR_PSR_R1 44
92 #define CURR_PSR_R2 88
93
94 #define TWL4030_BCI_BCICTL1 0x23
95 #define TWL4030_BCI_CGAIN 0x020
96 #define TWL4030_BCI_MESBAT (1 << 1)
97 #define TWL4030_BCI_TYPEN (1 << 4)
98 #define TWL4030_BCI_ITHEN (1 << 3)
99
100 #define REG_BCICTL2 0x024
101 #define TWL4030_BCI_ITHSENS 0x007
102
103 /* Register and bits for GPBR1 register */
104 #define TWL4030_REG_GPBR1 0x0c
105 #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
106
107 #define TWL4030_USB_SEL_MADC_MCPC (1<<3)
108 #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
109
110 struct twl4030_madc_conversion_method {
111 u8 sel;
112 u8 avg;
113 u8 rbase;
114 u8 ctrl;
115 };
116
117 /**
118 * struct twl4030_madc_request - madc request packet for channel conversion
119 * @channels: 16 bit bitmap for individual channels
120 * @do_avg: sample the input channel for 4 consecutive cycles
121 * @method: RT, SW1, SW2
122 * @type: Polling or interrupt based method
123 * @active: Flag if request is active
124 * @result_pending: Flag from irq handler, that result is ready
125 * @raw: Return raw value, do not convert it
126 * @rbuf: Result buffer
127 */
128 struct twl4030_madc_request {
129 unsigned long channels;
130 bool do_avg;
131 u16 method;
132 u16 type;
133 bool active;
134 bool result_pending;
135 bool raw;
136 int rbuf[TWL4030_MADC_MAX_CHANNELS];
137 };
138
139 enum conversion_methods {
140 TWL4030_MADC_RT,
141 TWL4030_MADC_SW1,
142 TWL4030_MADC_SW2,
143 TWL4030_MADC_NUM_METHODS
144 };
145
146 enum sample_type {
147 TWL4030_MADC_WAIT,
148 TWL4030_MADC_IRQ_ONESHOT,
149 TWL4030_MADC_IRQ_REARM
150 };
151
152 /**
153 * struct twl4030_madc_data - a container for madc info
154 * @dev: Pointer to device structure for madc
155 * @lock: Mutex protecting this data structure
156 * @usb3v1: Pointer to bias regulator for madc
157 * @requests: Array of request struct corresponding to SW1, SW2 and RT
158 * @use_second_irq: IRQ selection (main or co-processor)
159 * @imr: Interrupt mask register of MADC
160 * @isr: Interrupt status register of MADC
161 */
162 struct twl4030_madc_data {
163 struct device *dev;
164 struct mutex lock;
165 struct regulator *usb3v1;
166 struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
167 bool use_second_irq;
168 u8 imr;
169 u8 isr;
170 };
171
172 static int twl4030_madc_conversion(struct twl4030_madc_request *req);
173
twl4030_madc_read(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)174 static int twl4030_madc_read(struct iio_dev *iio_dev,
175 const struct iio_chan_spec *chan,
176 int *val, int *val2, long mask)
177 {
178 struct twl4030_madc_data *madc = iio_priv(iio_dev);
179 struct twl4030_madc_request req;
180 int ret;
181
182 req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1;
183
184 req.channels = BIT(chan->channel);
185 req.active = false;
186 req.type = TWL4030_MADC_WAIT;
187 req.raw = !(mask == IIO_CHAN_INFO_PROCESSED);
188 req.do_avg = (mask == IIO_CHAN_INFO_AVERAGE_RAW);
189
190 ret = twl4030_madc_conversion(&req);
191 if (ret < 0)
192 return ret;
193
194 *val = req.rbuf[chan->channel];
195
196 return IIO_VAL_INT;
197 }
198
199 static const struct iio_info twl4030_madc_iio_info = {
200 .read_raw = &twl4030_madc_read,
201 };
202
203 #define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \
204 .type = _type, \
205 .channel = _channel, \
206 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
207 BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \
208 BIT(IIO_CHAN_INFO_PROCESSED), \
209 .datasheet_name = _name, \
210 .indexed = 1, \
211 }
212
213 static const struct iio_chan_spec twl4030_madc_iio_channels[] = {
214 TWL4030_ADC_CHANNEL(0, IIO_VOLTAGE, "ADCIN0"),
215 TWL4030_ADC_CHANNEL(1, IIO_TEMP, "ADCIN1"),
216 TWL4030_ADC_CHANNEL(2, IIO_VOLTAGE, "ADCIN2"),
217 TWL4030_ADC_CHANNEL(3, IIO_VOLTAGE, "ADCIN3"),
218 TWL4030_ADC_CHANNEL(4, IIO_VOLTAGE, "ADCIN4"),
219 TWL4030_ADC_CHANNEL(5, IIO_VOLTAGE, "ADCIN5"),
220 TWL4030_ADC_CHANNEL(6, IIO_VOLTAGE, "ADCIN6"),
221 TWL4030_ADC_CHANNEL(7, IIO_VOLTAGE, "ADCIN7"),
222 TWL4030_ADC_CHANNEL(8, IIO_VOLTAGE, "ADCIN8"),
223 TWL4030_ADC_CHANNEL(9, IIO_VOLTAGE, "ADCIN9"),
224 TWL4030_ADC_CHANNEL(10, IIO_CURRENT, "ADCIN10"),
225 TWL4030_ADC_CHANNEL(11, IIO_VOLTAGE, "ADCIN11"),
226 TWL4030_ADC_CHANNEL(12, IIO_VOLTAGE, "ADCIN12"),
227 TWL4030_ADC_CHANNEL(13, IIO_VOLTAGE, "ADCIN13"),
228 TWL4030_ADC_CHANNEL(14, IIO_VOLTAGE, "ADCIN14"),
229 TWL4030_ADC_CHANNEL(15, IIO_VOLTAGE, "ADCIN15"),
230 };
231
232 static struct twl4030_madc_data *twl4030_madc;
233
234 static const struct s16_fract twl4030_divider_ratios[16] = {
235 {1, 1}, /* CHANNEL 0 No Prescaler */
236 {1, 1}, /* CHANNEL 1 No Prescaler */
237 {6, 10}, /* CHANNEL 2 */
238 {6, 10}, /* CHANNEL 3 */
239 {6, 10}, /* CHANNEL 4 */
240 {6, 10}, /* CHANNEL 5 */
241 {6, 10}, /* CHANNEL 6 */
242 {6, 10}, /* CHANNEL 7 */
243 {3, 14}, /* CHANNEL 8 */
244 {1, 3}, /* CHANNEL 9 */
245 {1, 1}, /* CHANNEL 10 No Prescaler */
246 {15, 100}, /* CHANNEL 11 */
247 {1, 4}, /* CHANNEL 12 */
248 {1, 1}, /* CHANNEL 13 Reserved channels */
249 {1, 1}, /* CHANNEL 14 Reseved channels */
250 {5, 11}, /* CHANNEL 15 */
251 };
252
253 /* Conversion table from -3 to 55 degrees Celcius */
254 static int twl4030_therm_tbl[] = {
255 30800, 29500, 28300, 27100,
256 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700,
257 17900, 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100,
258 12600, 12100, 11600, 11200, 10800, 10400, 10000, 9630, 9280,
259 8950, 8620, 8310, 8020, 7730, 7460, 7200, 6950, 6710,
260 6470, 6250, 6040, 5830, 5640, 5450, 5260, 5090, 4920,
261 4760, 4600, 4450, 4310, 4170, 4040, 3910, 3790, 3670,
262 3550
263 };
264
265 /*
266 * Structure containing the registers
267 * of different conversion methods supported by MADC.
268 * Hardware or RT real time conversion request initiated by external host
269 * processor for RT Signal conversions.
270 * External host processors can also request for non RT conversions
271 * SW1 and SW2 software conversions also called asynchronous or GPC request.
272 */
273 static
274 const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = {
275 [TWL4030_MADC_RT] = {
276 .sel = TWL4030_MADC_RTSELECT_LSB,
277 .avg = TWL4030_MADC_RTAVERAGE_LSB,
278 .rbase = TWL4030_MADC_RTCH0_LSB,
279 },
280 [TWL4030_MADC_SW1] = {
281 .sel = TWL4030_MADC_SW1SELECT_LSB,
282 .avg = TWL4030_MADC_SW1AVERAGE_LSB,
283 .rbase = TWL4030_MADC_GPCH0_LSB,
284 .ctrl = TWL4030_MADC_CTRL_SW1,
285 },
286 [TWL4030_MADC_SW2] = {
287 .sel = TWL4030_MADC_SW2SELECT_LSB,
288 .avg = TWL4030_MADC_SW2AVERAGE_LSB,
289 .rbase = TWL4030_MADC_GPCH0_LSB,
290 .ctrl = TWL4030_MADC_CTRL_SW2,
291 },
292 };
293
294 /**
295 * twl4030_madc_channel_raw_read() - Function to read a particular channel value
296 * @madc: pointer to struct twl4030_madc_data
297 * @reg: lsb of ADC Channel
298 *
299 * Return: 0 on success, an error code otherwise.
300 */
twl4030_madc_channel_raw_read(struct twl4030_madc_data * madc,u8 reg)301 static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg)
302 {
303 u16 val;
304 int ret;
305 /*
306 * For each ADC channel, we have MSB and LSB register pair. MSB address
307 * is always LSB address+1. reg parameter is the address of LSB register
308 */
309 ret = twl_i2c_read_u16(TWL4030_MODULE_MADC, &val, reg);
310 if (ret) {
311 dev_err(madc->dev, "unable to read register 0x%X\n", reg);
312 return ret;
313 }
314
315 return (int)(val >> 6);
316 }
317
318 /*
319 * Return battery temperature in degrees Celsius
320 * Or < 0 on failure.
321 */
twl4030battery_temperature(int raw_volt)322 static int twl4030battery_temperature(int raw_volt)
323 {
324 u8 val;
325 int temp, curr, volt, res, ret;
326
327 volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R;
328 /* Getting and calculating the supply current in micro amperes */
329 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
330 REG_BCICTL2);
331 if (ret < 0)
332 return ret;
333
334 curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10;
335 /* Getting and calculating the thermistor resistance in ohms */
336 res = volt * 1000 / curr;
337 /* calculating temperature */
338 for (temp = 58; temp >= 0; temp--) {
339 int actual = twl4030_therm_tbl[temp];
340 if ((actual - res) >= 0)
341 break;
342 }
343
344 return temp + 1;
345 }
346
twl4030battery_current(int raw_volt)347 static int twl4030battery_current(int raw_volt)
348 {
349 int ret;
350 u8 val;
351
352 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
353 TWL4030_BCI_BCICTL1);
354 if (ret)
355 return ret;
356 if (val & TWL4030_BCI_CGAIN) /* slope of 0.44 mV/mA */
357 return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R1;
358 else /* slope of 0.88 mV/mA */
359 return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R2;
360 }
361
362 /*
363 * Function to read channel values
364 * @madc - pointer to twl4030_madc_data struct
365 * @reg_base - Base address of the first channel
366 * @Channels - 16 bit bitmap. If the bit is set, channel's value is read
367 * @buf - The channel values are stored here. if read fails error
368 * @raw - Return raw values without conversion
369 * value is stored
370 * Returns the number of successfully read channels.
371 */
twl4030_madc_read_channels(struct twl4030_madc_data * madc,u8 reg_base,unsigned long channels,int * buf,bool raw)372 static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
373 u8 reg_base, unsigned
374 long channels, int *buf,
375 bool raw)
376 {
377 int count = 0;
378 int i;
379 u8 reg;
380
381 for_each_set_bit(i, &channels, TWL4030_MADC_MAX_CHANNELS) {
382 reg = reg_base + (2 * i);
383 buf[i] = twl4030_madc_channel_raw_read(madc, reg);
384 if (buf[i] < 0) {
385 dev_err(madc->dev, "Unable to read register 0x%X\n",
386 reg);
387 return buf[i];
388 }
389 if (raw) {
390 count++;
391 continue;
392 }
393 switch (i) {
394 case 10:
395 buf[i] = twl4030battery_current(buf[i]);
396 if (buf[i] < 0) {
397 dev_err(madc->dev, "err reading current\n");
398 return buf[i];
399 } else {
400 count++;
401 buf[i] = buf[i] - 750;
402 }
403 break;
404 case 1:
405 buf[i] = twl4030battery_temperature(buf[i]);
406 if (buf[i] < 0) {
407 dev_err(madc->dev, "err reading temperature\n");
408 return buf[i];
409 } else {
410 buf[i] -= 3;
411 count++;
412 }
413 break;
414 default:
415 count++;
416 /* Analog Input (V) = conv_result * step_size / R
417 * conv_result = decimal value of 10-bit conversion
418 * result
419 * step size = 1.5 / (2 ^ 10 -1)
420 * R = Prescaler ratio for input channels.
421 * Result given in mV hence multiplied by 1000.
422 */
423 buf[i] = (buf[i] * 3 * 1000 *
424 twl4030_divider_ratios[i].denominator)
425 / (2 * 1023 *
426 twl4030_divider_ratios[i].numerator);
427 }
428 }
429
430 return count;
431 }
432
433 /*
434 * Disables irq.
435 * @madc - pointer to twl4030_madc_data struct
436 * @id - irq number to be disabled
437 * can take one of TWL4030_MADC_RT, TWL4030_MADC_SW1, TWL4030_MADC_SW2
438 * corresponding to RT, SW1, SW2 conversion requests.
439 * Returns error if i2c read/write fails.
440 */
twl4030_madc_disable_irq(struct twl4030_madc_data * madc,u8 id)441 static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id)
442 {
443 u8 val;
444 int ret;
445
446 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr);
447 if (ret) {
448 dev_err(madc->dev, "unable to read imr register 0x%X\n",
449 madc->imr);
450 return ret;
451 }
452 val |= (1 << id);
453 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr);
454 if (ret) {
455 dev_err(madc->dev,
456 "unable to write imr register 0x%X\n", madc->imr);
457 return ret;
458 }
459
460 return 0;
461 }
462
twl4030_madc_threaded_irq_handler(int irq,void * _madc)463 static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
464 {
465 struct twl4030_madc_data *madc = _madc;
466 const struct twl4030_madc_conversion_method *method;
467 u8 isr_val, imr_val;
468 int i, ret;
469 struct twl4030_madc_request *r;
470
471 mutex_lock(&madc->lock);
472 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &isr_val, madc->isr);
473 if (ret) {
474 dev_err(madc->dev, "unable to read isr register 0x%X\n",
475 madc->isr);
476 goto err_i2c;
477 }
478 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr);
479 if (ret) {
480 dev_err(madc->dev, "unable to read imr register 0x%X\n",
481 madc->imr);
482 goto err_i2c;
483 }
484 isr_val &= ~imr_val;
485 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
486 if (!(isr_val & (1 << i)))
487 continue;
488 ret = twl4030_madc_disable_irq(madc, i);
489 if (ret < 0)
490 dev_dbg(madc->dev, "Disable interrupt failed %d\n", i);
491 madc->requests[i].result_pending = true;
492 }
493 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
494 r = &madc->requests[i];
495 /* No pending results for this method, move to next one */
496 if (!r->result_pending)
497 continue;
498 method = &twl4030_conversion_methods[r->method];
499 /* Read results */
500 twl4030_madc_read_channels(madc, method->rbase,
501 r->channels, r->rbuf, r->raw);
502 /* Free request */
503 r->result_pending = false;
504 r->active = false;
505 }
506 mutex_unlock(&madc->lock);
507
508 return IRQ_HANDLED;
509
510 err_i2c:
511 /*
512 * In case of error check whichever request is active
513 * and service the same.
514 */
515 for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
516 r = &madc->requests[i];
517 if (!r->active)
518 continue;
519 method = &twl4030_conversion_methods[r->method];
520 /* Read results */
521 twl4030_madc_read_channels(madc, method->rbase,
522 r->channels, r->rbuf, r->raw);
523 /* Free request */
524 r->result_pending = false;
525 r->active = false;
526 }
527 mutex_unlock(&madc->lock);
528
529 return IRQ_HANDLED;
530 }
531
532 /*
533 * Function which enables the madc conversion
534 * by writing to the control register.
535 * @madc - pointer to twl4030_madc_data struct
536 * @conv_method - can be TWL4030_MADC_RT, TWL4030_MADC_SW2, TWL4030_MADC_SW1
537 * corresponding to RT SW1 or SW2 conversion methods.
538 * Returns 0 if succeeds else a negative error value
539 */
twl4030_madc_start_conversion(struct twl4030_madc_data * madc,int conv_method)540 static int twl4030_madc_start_conversion(struct twl4030_madc_data *madc,
541 int conv_method)
542 {
543 const struct twl4030_madc_conversion_method *method;
544 int ret = 0;
545
546 if (conv_method != TWL4030_MADC_SW1 && conv_method != TWL4030_MADC_SW2)
547 return -ENOTSUPP;
548
549 method = &twl4030_conversion_methods[conv_method];
550 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, TWL4030_MADC_SW_START,
551 method->ctrl);
552 if (ret) {
553 dev_err(madc->dev, "unable to write ctrl register 0x%X\n",
554 method->ctrl);
555 return ret;
556 }
557
558 return 0;
559 }
560
561 /*
562 * Function that waits for conversion to be ready
563 * @madc - pointer to twl4030_madc_data struct
564 * @timeout_ms - timeout value in milliseconds
565 * @status_reg - ctrl register
566 * returns 0 if succeeds else a negative error value
567 */
twl4030_madc_wait_conversion_ready(struct twl4030_madc_data * madc,unsigned int timeout_ms,u8 status_reg)568 static int twl4030_madc_wait_conversion_ready(struct twl4030_madc_data *madc,
569 unsigned int timeout_ms,
570 u8 status_reg)
571 {
572 unsigned long timeout;
573 int ret;
574
575 timeout = jiffies + msecs_to_jiffies(timeout_ms);
576 do {
577 u8 reg;
578
579 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, ®, status_reg);
580 if (ret) {
581 dev_err(madc->dev,
582 "unable to read status register 0x%X\n",
583 status_reg);
584 return ret;
585 }
586 if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW))
587 return 0;
588 usleep_range(500, 2000);
589 } while (!time_after(jiffies, timeout));
590 dev_err(madc->dev, "conversion timeout!\n");
591
592 return -EAGAIN;
593 }
594
595 /*
596 * An exported function which can be called from other kernel drivers.
597 * @req twl4030_madc_request structure
598 * req->rbuf will be filled with read values of channels based on the
599 * channel index. If a particular channel reading fails there will
600 * be a negative error value in the corresponding array element.
601 * returns 0 if succeeds else error value
602 */
twl4030_madc_conversion(struct twl4030_madc_request * req)603 static int twl4030_madc_conversion(struct twl4030_madc_request *req)
604 {
605 const struct twl4030_madc_conversion_method *method;
606 int ret;
607
608 if (!req || !twl4030_madc)
609 return -EINVAL;
610
611 mutex_lock(&twl4030_madc->lock);
612 if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) {
613 ret = -EINVAL;
614 goto out;
615 }
616 /* Do we have a conversion request ongoing */
617 if (twl4030_madc->requests[req->method].active) {
618 ret = -EBUSY;
619 goto out;
620 }
621 method = &twl4030_conversion_methods[req->method];
622 /* Select channels to be converted */
623 ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, method->sel);
624 if (ret) {
625 dev_err(twl4030_madc->dev,
626 "unable to write sel register 0x%X\n", method->sel);
627 goto out;
628 }
629 /* Select averaging for all channels if do_avg is set */
630 if (req->do_avg) {
631 ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels,
632 method->avg);
633 if (ret) {
634 dev_err(twl4030_madc->dev,
635 "unable to write avg register 0x%X\n",
636 method->avg);
637 goto out;
638 }
639 }
640 /* With RT method we should not be here anymore */
641 if (req->method == TWL4030_MADC_RT) {
642 ret = -EINVAL;
643 goto out;
644 }
645 ret = twl4030_madc_start_conversion(twl4030_madc, req->method);
646 if (ret < 0)
647 goto out;
648 twl4030_madc->requests[req->method].active = true;
649 /* Wait until conversion is ready (ctrl register returns EOC) */
650 ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl);
651 if (ret) {
652 twl4030_madc->requests[req->method].active = false;
653 goto out;
654 }
655 ret = twl4030_madc_read_channels(twl4030_madc, method->rbase,
656 req->channels, req->rbuf, req->raw);
657 twl4030_madc->requests[req->method].active = false;
658
659 out:
660 mutex_unlock(&twl4030_madc->lock);
661
662 return ret;
663 }
664
665 /**
666 * twl4030_madc_set_current_generator() - setup bias current
667 *
668 * @madc: pointer to twl4030_madc_data struct
669 * @chan: can be one of the two values:
670 * 0 - Enables bias current for main battery type reading
671 * 1 - Enables bias current for main battery temperature sensing
672 * @on: enable or disable chan.
673 *
674 * Function to enable or disable bias current for
675 * main battery type reading or temperature sensing
676 */
twl4030_madc_set_current_generator(struct twl4030_madc_data * madc,int chan,int on)677 static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
678 int chan, int on)
679 {
680 int ret;
681 int regmask;
682 u8 regval;
683
684 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
685 ®val, TWL4030_BCI_BCICTL1);
686 if (ret) {
687 dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X",
688 TWL4030_BCI_BCICTL1);
689 return ret;
690 }
691
692 regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
693 if (on)
694 regval |= regmask;
695 else
696 regval &= ~regmask;
697
698 ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
699 regval, TWL4030_BCI_BCICTL1);
700 if (ret) {
701 dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n",
702 TWL4030_BCI_BCICTL1);
703 return ret;
704 }
705
706 return 0;
707 }
708
709 /*
710 * Function that sets MADC software power on bit to enable MADC
711 * @madc - pointer to twl4030_madc_data struct
712 * @on - Enable or disable MADC software power on bit.
713 * returns error if i2c read/write fails else 0
714 */
twl4030_madc_set_power(struct twl4030_madc_data * madc,int on)715 static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
716 {
717 u8 regval;
718 int ret;
719
720 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
721 ®val, TWL4030_MADC_CTRL1);
722 if (ret) {
723 dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n",
724 TWL4030_MADC_CTRL1);
725 return ret;
726 }
727 if (on)
728 regval |= TWL4030_MADC_MADCON;
729 else
730 regval &= ~TWL4030_MADC_MADCON;
731 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1);
732 if (ret) {
733 dev_err(madc->dev, "unable to write madc ctrl1 reg 0x%X\n",
734 TWL4030_MADC_CTRL1);
735 return ret;
736 }
737
738 return 0;
739 }
740
741 /*
742 * Initialize MADC and request for threaded irq
743 */
twl4030_madc_probe(struct platform_device * pdev)744 static int twl4030_madc_probe(struct platform_device *pdev)
745 {
746 struct twl4030_madc_data *madc;
747 struct twl4030_madc_platform_data *pdata = dev_get_platdata(&pdev->dev);
748 struct device_node *np = pdev->dev.of_node;
749 int irq, ret;
750 u8 regval;
751 struct iio_dev *iio_dev = NULL;
752
753 if (!pdata && !np) {
754 dev_err(&pdev->dev, "neither platform data nor Device Tree node available\n");
755 return -EINVAL;
756 }
757
758 iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*madc));
759 if (!iio_dev) {
760 dev_err(&pdev->dev, "failed allocating iio device\n");
761 return -ENOMEM;
762 }
763
764 madc = iio_priv(iio_dev);
765 madc->dev = &pdev->dev;
766
767 iio_dev->name = dev_name(&pdev->dev);
768 iio_dev->info = &twl4030_madc_iio_info;
769 iio_dev->modes = INDIO_DIRECT_MODE;
770 iio_dev->channels = twl4030_madc_iio_channels;
771 iio_dev->num_channels = ARRAY_SIZE(twl4030_madc_iio_channels);
772
773 /*
774 * Phoenix provides 2 interrupt lines. The first one is connected to
775 * the OMAP. The other one can be connected to the other processor such
776 * as modem. Hence two separate ISR and IMR registers.
777 */
778 if (pdata)
779 madc->use_second_irq = (pdata->irq_line != 1);
780 else
781 madc->use_second_irq = of_property_read_bool(np,
782 "ti,system-uses-second-madc-irq");
783
784 madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 :
785 TWL4030_MADC_IMR1;
786 madc->isr = madc->use_second_irq ? TWL4030_MADC_ISR2 :
787 TWL4030_MADC_ISR1;
788
789 ret = twl4030_madc_set_power(madc, 1);
790 if (ret < 0)
791 return ret;
792 ret = twl4030_madc_set_current_generator(madc, 0, 1);
793 if (ret < 0)
794 goto err_current_generator;
795
796 ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
797 ®val, TWL4030_BCI_BCICTL1);
798 if (ret) {
799 dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n",
800 TWL4030_BCI_BCICTL1);
801 goto err_i2c;
802 }
803 regval |= TWL4030_BCI_MESBAT;
804 ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
805 regval, TWL4030_BCI_BCICTL1);
806 if (ret) {
807 dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n",
808 TWL4030_BCI_BCICTL1);
809 goto err_i2c;
810 }
811
812 /* Check that MADC clock is on */
813 ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, ®val, TWL4030_REG_GPBR1);
814 if (ret) {
815 dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
816 TWL4030_REG_GPBR1);
817 goto err_i2c;
818 }
819
820 /* If MADC clk is not on, turn it on */
821 if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
822 dev_info(&pdev->dev, "clk disabled, enabling\n");
823 regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
824 ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
825 TWL4030_REG_GPBR1);
826 if (ret) {
827 dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
828 TWL4030_REG_GPBR1);
829 goto err_i2c;
830 }
831 }
832
833 platform_set_drvdata(pdev, iio_dev);
834 mutex_init(&madc->lock);
835
836 irq = platform_get_irq(pdev, 0);
837 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
838 twl4030_madc_threaded_irq_handler,
839 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
840 "twl4030_madc", madc);
841 if (ret) {
842 dev_err(&pdev->dev, "could not request irq\n");
843 goto err_i2c;
844 }
845 twl4030_madc = madc;
846
847 /* Configure MADC[3:6] */
848 ret = twl_i2c_read_u8(TWL_MODULE_USB, ®val,
849 TWL4030_USB_CARKIT_ANA_CTRL);
850 if (ret) {
851 dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n",
852 TWL4030_USB_CARKIT_ANA_CTRL);
853 goto err_i2c;
854 }
855 regval |= TWL4030_USB_SEL_MADC_MCPC;
856 ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
857 TWL4030_USB_CARKIT_ANA_CTRL);
858 if (ret) {
859 dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n",
860 TWL4030_USB_CARKIT_ANA_CTRL);
861 goto err_i2c;
862 }
863
864 /* Enable 3v1 bias regulator for MADC[3:6] */
865 madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
866 if (IS_ERR(madc->usb3v1)) {
867 ret = -ENODEV;
868 goto err_i2c;
869 }
870
871 ret = regulator_enable(madc->usb3v1);
872 if (ret) {
873 dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
874 goto err_i2c;
875 }
876
877 ret = iio_device_register(iio_dev);
878 if (ret) {
879 dev_err(&pdev->dev, "could not register iio device\n");
880 goto err_usb3v1;
881 }
882
883 return 0;
884
885 err_usb3v1:
886 regulator_disable(madc->usb3v1);
887 err_i2c:
888 twl4030_madc_set_current_generator(madc, 0, 0);
889 err_current_generator:
890 twl4030_madc_set_power(madc, 0);
891 return ret;
892 }
893
twl4030_madc_remove(struct platform_device * pdev)894 static int twl4030_madc_remove(struct platform_device *pdev)
895 {
896 struct iio_dev *iio_dev = platform_get_drvdata(pdev);
897 struct twl4030_madc_data *madc = iio_priv(iio_dev);
898
899 iio_device_unregister(iio_dev);
900
901 twl4030_madc_set_current_generator(madc, 0, 0);
902 twl4030_madc_set_power(madc, 0);
903
904 regulator_disable(madc->usb3v1);
905
906 return 0;
907 }
908
909 #ifdef CONFIG_OF
910 static const struct of_device_id twl_madc_of_match[] = {
911 { .compatible = "ti,twl4030-madc", },
912 { },
913 };
914 MODULE_DEVICE_TABLE(of, twl_madc_of_match);
915 #endif
916
917 static struct platform_driver twl4030_madc_driver = {
918 .probe = twl4030_madc_probe,
919 .remove = twl4030_madc_remove,
920 .driver = {
921 .name = "twl4030_madc",
922 .of_match_table = of_match_ptr(twl_madc_of_match),
923 },
924 };
925
926 module_platform_driver(twl4030_madc_driver);
927
928 MODULE_DESCRIPTION("TWL4030 ADC driver");
929 MODULE_LICENSE("GPL");
930 MODULE_AUTHOR("J Keerthy");
931 MODULE_ALIAS("platform:twl4030_madc");
932