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Searched refs:TIMER1 (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/Documentation/devicetree/bindings/timer/
Dsnps,arc-timer.txt4 - Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically
6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
/linux-6.1.9/drivers/staging/rtl8712/
Drtl8712_gp_regdef.h18 #define TIMER1 (RTL8712_GP_ + 0x04) macro
/linux-6.1.9/arch/arc/boot/dts/
Dskeleton.dtsi38 /* TIMER1 for free running clocksource */
Dskeleton_hs.dtsi39 /* TIMER1 for free running clocksource: Fallback if rtc not found */
Dabilis_tb10x.dtsi34 /* TIMER1 for free running clocksource */
/linux-6.1.9/drivers/pinctrl/
Dpinctrl-lpc18xx.c295 LPC_P(5,0, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
296 LPC_P(5,1, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
297 LPC_P(5,2, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
298 LPC_P(5,3, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
299 LPC_P(5,4, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
300 LPC_P(5,5, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
301 LPC_P(5,6, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
302 LPC_P(5,7, GPIO, MCTRL, EMC, R, UART1, TIMER1, R, R, 0, ND);
/linux-6.1.9/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm2835-armctrl-ic.txt46 1: TIMER1
/linux-6.1.9/drivers/clocksource/
DKconfig180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
181 where TIMER0 serves as clockevent and TIMER1 serves as clocksource.
289 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
291 TIMER0 serves as clockevent while TIMER1 provides clocksource.
/linux-6.1.9/arch/arm/boot/dts/
Dintegratorcp.dts155 /* TIMER1 runs @ 1MHz */
/linux-6.1.9/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dreg.h225 #define TIMER1 0x02E8 macro
/linux-6.1.9/drivers/clk/nxp/
Dclk-lpc32xx.c267 LPC32XX_CLK_DEFINE(TIMER1, "timer1", 0x0, LPC32XX_CLK_PERIPH),
1258 LPC32XX_DEFINE_GATE(TIMER1, TIMCLK_CTRL1, 3, 0),