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Searched refs:THM_CLK_CNTL__TMON_CLK_SEL_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dfiji_baco.c104 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK…
Dci_baco.c120 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK…
Dpolaris_baco.c99 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK…
Dtonga_baco.c112 …{ CMD_READMODIFYWRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CL…
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dcik.c1824 THM_CLK_CNTL__TMON_CLK_SEL_MASK); in cik_program_aspm()
Dvi.c1220 data &= ~(THM_CLK_CNTL__CMON_CLK_SEL_MASK | THM_CLK_CNTL__TMON_CLK_SEL_MASK); in vi_program_aspm()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_7_0_0_sh_mask.h265 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro
Dsmu_7_1_1_sh_mask.h263 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro
Dsmu_7_0_1_sh_mask.h263 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro
Dsmu_7_1_0_sh_mask.h261 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro
Dsmu_7_1_2_sh_mask.h263 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro
Dsmu_7_1_3_sh_mask.h291 #define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0xff00 macro