Searched refs:THM_CLK_CNTL__CMON_CLK_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | fiji_baco.c | 103 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
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| D | ci_baco.c | 119 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
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| D | polaris_baco.c | 98 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
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| D | tonga_baco.c | 111 …RITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__CMON_CLK_SEL_MASK, THM_CLK_CNTL__CMON_CLK_SEL__SHIFT, 0, …
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | cik.c | 1825 data |= (1 << THM_CLK_CNTL__CMON_CLK_SEL__SHIFT) | in cik_program_aspm()
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| D | vi.c | 1221 data |= (1 << THM_CLK_CNTL__CMON_CLK_SEL__SHIFT) | in vi_program_aspm()
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| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_7_0_0_sh_mask.h | 264 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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| D | smu_7_1_1_sh_mask.h | 262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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| D | smu_7_0_1_sh_mask.h | 262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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| D | smu_7_1_0_sh_mask.h | 260 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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| D | smu_7_1_2_sh_mask.h | 262 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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| D | smu_7_1_3_sh_mask.h | 290 #define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x0 macro
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