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Searched refs:TEGRA20_CLK_PLL_P (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/drivers/clk/tegra/
Dclk-tegra20.c423 { .con_id = "pll_p", .dt_id = TEGRA20_CLK_PLL_P },
550 [tegra_clk_pll_p] = { .dt_id = TEGRA20_CLK_PLL_P, .present = true },
1014 { TEGRA20_CLK_PLL_P, TEGRA20_CLK_CLK_MAX, 216000000, 1 },
1026 { TEGRA20_CLK_UARTA, TEGRA20_CLK_PLL_P, 0, 0 },
1027 { TEGRA20_CLK_UARTB, TEGRA20_CLK_PLL_P, 0, 0 },
1028 { TEGRA20_CLK_UARTC, TEGRA20_CLK_PLL_P, 0, 0 },
1029 { TEGRA20_CLK_UARTD, TEGRA20_CLK_PLL_P, 0, 0 },
1030 { TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0 },
1035 { TEGRA20_CLK_SDMMC1, TEGRA20_CLK_PLL_P, 48000000, 0 },
1036 { TEGRA20_CLK_SDMMC3, TEGRA20_CLK_PLL_P, 48000000, 0 },
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/linux-6.1.9/include/dt-bindings/clock/
Dtegra20-car.h144 #define TEGRA20_CLK_PLL_P 121 macro
/linux-6.1.9/arch/arm/boot/dts/
Dtegra20.dtsi126 <&tegra_car TEGRA20_CLK_PLL_P>;
156 <&tegra_car TEGRA20_CLK_PLL_P>;