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Searched refs:TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h10724 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK 0x0000ffffL macro
Dgfx_7_2_sh_mask.h14603 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK 0xffff macro
Dgfx_8_0_sh_mask.h16531 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK 0xffff macro
Dgfx_8_1_sh_mask.h17119 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK 0xffff macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h9086 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro
Dgc_9_1_sh_mask.h10591 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro
Dgc_9_2_1_sh_mask.h10421 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro
Dgc_9_4_2_sh_mask.h27817 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro
Dgc_10_1_0_sh_mask.h15729 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro
Dgc_10_3_0_sh_mask.h14528 #define TCI_CNTL_1__WBINVL1_NUM_CYCLES_MASK … macro